This patch moves GuC suspend/resume handlers to corresponding GEM handlers and orders them properly in the runtime and system suspend/resume flows. It also adds documentation for GEM suspend/resume handlers. i915_gem_restore_fences is GEM resumption task hence it is moved to i915_gem_resume from i915_restore_state.
Cc: Chris Wilson <[email protected]> Cc: Imre Deak <[email protected]> Cc: Paulo Zanoni <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Michał Winiarski <[email protected]> Signed-off-by: Sagar Arun Kamble <[email protected]> --- drivers/gpu/drm/i915/i915_drv.c | 6 ----- drivers/gpu/drm/i915/i915_gem.c | 47 ++++++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/i915_suspend.c | 2 -- 3 files changed, 44 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 15e6c56..aa70142 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1698,8 +1698,6 @@ static int i915_drm_resume(struct drm_device *dev) } mutex_unlock(&dev->struct_mutex); - intel_guc_resume(dev_priv); - intel_modeset_init_hw(dev); spin_lock_irq(&dev_priv->irq_lock); @@ -2504,8 +2502,6 @@ static int intel_runtime_suspend(struct device *kdev) return ret; } - intel_guc_suspend(dev_priv); - intel_runtime_pm_disable_interrupts(dev_priv); ret = 0; @@ -2591,8 +2587,6 @@ static int intel_runtime_resume(struct device *kdev) if (intel_uncore_unclaimed_mmio(dev_priv)) DRM_DEBUG_DRIVER("Unclaimed access during suspend, bios?\n"); - intel_guc_resume(dev_priv); - if (IS_GEN9_LP(dev_priv)) { bxt_disable_dc9(dev_priv); bxt_display_core_init(dev_priv, true); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 05381b3..ff1131c 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2022,11 +2022,22 @@ int i915_gem_fault(struct vm_fault *vmf) intel_runtime_pm_put(i915); } +/** + * i915_gem_runtime_suspend() - Finish GEM suspend + * @dev_priv: i915 device private + * + * This function suspends GuC, removes userspace mappings for all GEM obejcts + * currently on userfault list and marks fences if any being used as lost. + * + * Return: non-zero code on error + */ int i915_gem_runtime_suspend(struct drm_i915_private *dev_priv) { struct drm_i915_gem_object *obj, *on; int i; + intel_guc_suspend(dev_priv); + /* * Only called during RPM suspend. All users of the userfault_list * must be holding an RPM wakeref to ensure that this can not @@ -2069,6 +2080,14 @@ int i915_gem_runtime_suspend(struct drm_i915_private *dev_priv) return 0; } +/** + * i915_gem_runtime_resume() - Restore GEM state + * @dev_priv: i915 device private + * + * This function inits swizzling, restores fences and resumes GuC. + * + * Return: non-zero code on error + */ int i915_gem_runtime_resume(struct drm_i915_private *dev_priv) { /* @@ -2078,6 +2097,8 @@ int i915_gem_runtime_resume(struct drm_i915_private *dev_priv) i915_gem_init_swizzling(dev_priv); i915_gem_restore_fences(dev_priv); + intel_guc_resume(dev_priv); + return 0; } @@ -4521,6 +4542,16 @@ void i915_gem_sanitize(struct drm_i915_private *i915) } } +/** + * i915_gem_suspend() - Suspend all GT activity. + * @dev_priv: i915 device private + * + * This function disables RPS, flushes all executing context ensuring + * GEM/GT/Engines idleness, cancels all work that needs GT access and suspends + * GuC. In the end currently, it also reset the GEM state and GPU HW. + * + * Return: non-zero code on error + */ int i915_gem_suspend(struct drm_i915_private *dev_priv) { struct drm_device *dev = &dev_priv->drm; @@ -4553,8 +4584,6 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) i915_gem_contexts_lost(dev_priv); mutex_unlock(&dev->struct_mutex); - intel_guc_suspend(dev_priv); - cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work); cancel_delayed_work_sync(&dev_priv->gt.retire_work); @@ -4571,6 +4600,8 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) if (WARN_ON(!intel_engines_are_idle(dev_priv))) i915_gem_set_wedged(dev_priv); /* no hope, discard everything */ + intel_guc_suspend(dev_priv); + /* * Neither the BIOS, ourselves or any other kernel * expects the system to be in execlists mode on startup, @@ -4601,6 +4632,15 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) return ret; } +/** + * i915_gem_resume() - Resume GT activity. + * @dev_priv: i915 device private + * + * This function restores GTT mappings, restores fences and resets the + * context images and resumes GuC. + * + * Return: non-zero code on error + */ int i915_gem_resume(struct drm_i915_private *dev_priv) { struct drm_device *dev = &dev_priv->drm; @@ -4609,13 +4649,14 @@ int i915_gem_resume(struct drm_i915_private *dev_priv) mutex_lock(&dev->struct_mutex); i915_gem_restore_gtt_mappings(dev_priv); + i915_gem_restore_fences(dev_priv); /* As we didn't flush the kernel context before suspend, we cannot * guarantee that the context image is complete. So let's just reset * it and start again. */ dev_priv->gt.resume(dev_priv); - + intel_guc_resume(dev_priv); mutex_unlock(&dev->struct_mutex); return 0; diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 5c86925a..8f3aa4d 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -108,8 +108,6 @@ int i915_restore_state(struct drm_i915_private *dev_priv) mutex_lock(&dev_priv->drm.struct_mutex); - i915_gem_restore_fences(dev_priv); - if (IS_GEN4(dev_priv)) pci_write_config_word(pdev, GCDGMBUS, dev_priv->regfile.saveGCDGMBUS); -- 1.9.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
