Instead of limiting the range with this unusual GEN_RANGE
let's assume following platforms would use same scheme
unless stated otherwise.
In our regular flow of platform enabling we check for
INTEL_GEN occurences, while GEN_RANGE had only this
specific usage and consequently got forgotten,
blocking userspace on CNL to read RCS Timestamps.
That case was later identified and fixed with:
f1294585d8e1 ("drm/i915/cnl: Allow the reg_read ioctl
to read the RCS TIMESTAMP register")
So this patch extend this a bit futher so we don't
end in similar situations in near future.
This patch reverts the last remaining usage of the
original patch where it was added: af76ae447d44 ("drm/i915:
Use a macro to express the range of valid gens for reg_read")
Cc: Ben Widawsky <[email protected]>
Cc: Nanley Chery <[email protected]>
Cc: Paulo Zanoni <[email protected]>
Cc: Jani Nikula <[email protected]>
Cc: Joonas Lahtinen <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
---
drivers/gpu/drm/i915/intel_uncore.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index 0529af7cfbb8..5ff854b489a0 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1241,17 +1241,14 @@ void intel_uncore_fini(struct drm_i915_private
*dev_priv)
intel_uncore_forcewake_reset(dev_priv, false);
}
-#define GEN_RANGE(l, h) GENMASK((h) - 1, (l) - 1)
-
static const struct register_whitelist {
i915_reg_t offset_ldw, offset_udw;
uint32_t size;
- /* supported gens, 0x10 for 4, 0x30 for 4 and 5, etc. */
- uint32_t gen_bitmask;
} whitelist[] = {
{ .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
.offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
- .size = 8, .gen_bitmask = GEN_RANGE(4, 10) },
+ .size = 8
+ },
};
int i915_reg_read_ioctl(struct drm_device *dev,
@@ -1266,7 +1263,7 @@ int i915_reg_read_ioctl(struct drm_device *dev,
for (i = 0; i < ARRAY_SIZE(whitelist); i++, entry++) {
if (i915_mmio_reg_offset(entry->offset_ldw) == (reg->offset &
-entry->size) &&
- (INTEL_INFO(dev_priv)->gen_mask & entry->gen_bitmask))
+ (INTEL_GEN(dev_priv) >= 4))
break;
}
--
2.13.2
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