On Tue, Aug 29, 2017 at 12:48:03PM +0300, Juha-Pekka Heikkila wrote:
> Don't handle skylake primary plane separately as it is similar
> plane as the others.
> 
> Signed-off-by: Juha-Pekka Heikkila <[email protected]>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 81 
> +-----------------------------------
>  drivers/gpu/drm/i915/intel_drv.h     |  3 ++
>  drivers/gpu/drm/i915/intel_sprite.c  |  2 +-
>  3 files changed, 6 insertions(+), 80 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index f922e2f..9082a2c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3534,83 +3534,6 @@ u32 skl_plane_ctl(const struct intel_crtc_state 
> *crtc_state,
>       return plane_ctl;
>  }
>  
> -static void skylake_update_primary_plane(struct intel_plane *plane,
> -                                      const struct intel_crtc_state 
> *crtc_state,
> -                                      const struct intel_plane_state 
> *plane_state)
> -{
> -     struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> -     struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
> -     const struct drm_framebuffer *fb = plane_state->base.fb;
> -     enum plane_id plane_id = plane->id;
> -     enum pipe pipe = plane->pipe;
> -     u32 plane_ctl = plane_state->ctl;
> -     unsigned int rotation = plane_state->base.rotation;
> -     u32 stride = skl_plane_stride(fb, 0, rotation);
> -     u32 aux_stride = skl_plane_stride(fb, 1, rotation);
> -     u32 surf_addr = plane_state->main.offset;
> -     int scaler_id = plane_state->scaler_id;
> -     int src_x = plane_state->main.x;
> -     int src_y = plane_state->main.y;
> -     int src_w = drm_rect_width(&plane_state->base.src) >> 16;
> -     int src_h = drm_rect_height(&plane_state->base.src) >> 16;
> -     int dst_x = plane_state->base.dst.x1;
> -     int dst_y = plane_state->base.dst.y1;
> -     int dst_w = drm_rect_width(&plane_state->base.dst);
> -     int dst_h = drm_rect_height(&plane_state->base.dst);
> -     unsigned long irqflags;
> -
> -     /* Sizes are 0 based */
> -     src_w--;
> -     src_h--;
> -     dst_w--;
> -     dst_h--;
> -
> -     crtc->dspaddr_offset = surf_addr;
> -
> -     crtc->adjusted_x = src_x;
> -     crtc->adjusted_y = src_y;

I think that's going to break FBC.

Probably the best thing to do is kill adjusted_x/y and instead replace
them with something better in the fbc code. That something being
essentially plane_state->main.x/y. Though I think they need to get
plumbed through the fbc state_cache, and I think we should kill off the
FBC crtc->base.y usage while we're at it. So maybe we can just compute
the final fence_y_offset in intel_fbc_update_state_cache() and stick
that into the state_cache. Cc:ing Paulo for his thoughts...

> -
> -     spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> -     if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
> -             I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id),
> -                           PLANE_COLOR_PIPE_GAMMA_ENABLE |
> -                           PLANE_COLOR_PIPE_CSC_ENABLE |
> -                           PLANE_COLOR_PLANE_GAMMA_DISABLE);
> -     }
> -
> -     I915_WRITE_FW(PLANE_CTL(pipe, plane_id), plane_ctl);
> -     I915_WRITE_FW(PLANE_OFFSET(pipe, plane_id), (src_y << 16) | src_x);
> -     I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride);
> -     I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w);
> -     I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id),
> -                   (plane_state->aux.offset - surf_addr) | aux_stride);
> -     I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id),
> -                   (plane_state->aux.y << 16) | plane_state->aux.x);
> -
> -     if (scaler_id >= 0) {
> -             uint32_t ps_ctrl = 0;
> -
> -             WARN_ON(!dst_w || !dst_h);
> -             ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane_id) |
> -                     crtc_state->scaler_state.scalers[scaler_id].mode;
> -             I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl);
> -             I915_WRITE_FW(SKL_PS_PWR_GATE(pipe, scaler_id), 0);
> -             I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (dst_x << 16) | 
> dst_y);
> -             I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id), (dst_w << 16) | 
> dst_h);
> -             I915_WRITE_FW(PLANE_POS(pipe, plane_id), 0);
> -     } else {
> -             I915_WRITE_FW(PLANE_POS(pipe, plane_id), (dst_y << 16) | dst_x);
> -     }
> -
> -     I915_WRITE_FW(PLANE_SURF(pipe, plane_id),
> -                   intel_plane_ggtt_offset(plane_state) + surf_addr);
> -
> -     POSTING_READ_FW(PLANE_SURF(pipe, plane_id));
> -
> -     spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> -}
> -
>  static void skylake_disable_primary_plane(struct intel_plane *primary,
>                                         struct intel_crtc *crtc)
>  {
> @@ -13265,7 +13188,7 @@ intel_primary_plane_create(struct drm_i915_private 
> *dev_priv, enum pipe pipe)
>               num_formats = ARRAY_SIZE(skl_primary_formats);
>               modifiers = skl_format_modifiers_ccs;
>  
> -             primary->update_plane = skylake_update_primary_plane;
> +             primary->update_plane = skl_update_plane;
>               primary->disable_plane = skylake_disable_primary_plane;
>       } else if (INTEL_GEN(dev_priv) >= 9) {
>               intel_primary_formats = skl_primary_formats;
> @@ -13275,7 +13198,7 @@ intel_primary_plane_create(struct drm_i915_private 
> *dev_priv, enum pipe pipe)
>               else
>                       modifiers = skl_format_modifiers_noccs;
>  
> -             primary->update_plane = skylake_update_primary_plane;
> +             primary->update_plane = skl_update_plane;
>               primary->disable_plane = skylake_disable_primary_plane;
>       } else if (INTEL_GEN(dev_priv) >= 4) {
>               intel_primary_formats = i965_primary_formats;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 0d0abed1..1efd612 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1887,6 +1887,9 @@ int intel_sprite_set_colorkey(struct drm_device *dev, 
> void *data,
>                             struct drm_file *file_priv);
>  void intel_pipe_update_start(struct intel_crtc *crtc);
>  void intel_pipe_update_end(struct intel_crtc *crtc);
> +void skl_update_plane(struct intel_plane *plane,
> +                   const struct intel_crtc_state *crtc_state,
> +                   const struct intel_plane_state *plane_state);
>  
>  /* intel_tv.c */
>  void intel_tv_init(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
> b/drivers/gpu/drm/i915/intel_sprite.c
> index 524933b..ef16519 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -225,7 +225,7 @@ void intel_pipe_update_end(struct intel_crtc *crtc)
>  #endif
>  }
>  
> -static void
> +void
>  skl_update_plane(struct intel_plane *plane,
>                const struct intel_crtc_state *crtc_state,
>                const struct intel_plane_state *plane_state)
> -- 
> 2.7.4
> 
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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