To be clear, I believe right now, GVT-g architecture on upstream still only have one Virtualized DP monitor which will be on port B/D, but we have patches (not yet upstream) that have 3 virtualized DP monitors which will be attached to Port A/B/D. So we need to add this flexibility in the code so that it is not conflicted with eDP logic.
From: Anuar, Nuhairi Sent: Wednesday, June 14, 2017 10:55 PM To: Ville Syrjälä <[email protected]>; He, Min <[email protected]> Cc: [email protected]; Mustaffa, Mustamin B <[email protected]> Subject: Re: [Intel-gfx] [PATCH] drm/i915: fix the issue DP-1 not working in guest For a virtualized boot, it is possible for port A to be tied to DP. Min He any additional comment? On Jun 14, 2017 9:38 PM, Ville Syrjälä <[email protected]<mailto:[email protected]>> wrote: On Wed, Jun 14, 2017 at 01:47:30PM +0800, Mustamin B Mustaffa wrote: > From: "Anuar, Nuhairi" > <[email protected]<mailto:[email protected]>> > > In GVT guest, when port A is DP, i915 will force it as an EDP panel, > which > will cause DP-1 not working in GVT guest. > This patch fixed this issue by check intel_vgpu_active() in > intel_ddi_compute_config(). > > Signed-off-by: Min He <[email protected]<mailto:[email protected]>> > Signed-off-by: Nuhairi Anuar > <[email protected]<mailto:[email protected]>> > --- > drivers/gpu/drm/i915/intel_ddi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c > b/drivers/gpu/drm/i915/intel_ddi.c > index 66b367d..1110cbc 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -2069,7 +2069,7 @@ static bool intel_ddi_compute_config(struct > intel_encoder *encoder, > > WARN(type == INTEL_OUTPUT_UNKNOWN, "compute_config() on unknown > output!\n"); > > - if (port == PORT_A) > + if (port == PORT_A && !intel_vgpu_active(dev_priv)) > pipe_config->cpu_transcoder = TRANSCODER_EDP; And why exactly are you trying to register DP on port A? > > if (type == INTEL_OUTPUT_HDMI) > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > [email protected]<mailto:[email protected]> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC
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