... we need it later on in the function to clean up pipe <-> plane
associations. This regression has been introduced in

commit f47166d2b0001fcb752b40c5a2d4db986dfbea68
Author: Chris Wilson <[email protected]>
Date:   Thu Mar 22 15:00:50 2012 +0000

    drm/i915: Sanitize BIOS debugging bits from PIPECONF

Spotted by staring at debug output of an (as it turns out) totally
unrelated bug.

v2: I've totally failed to do the s/pipe/i/ correctly, spotted by
Chris Wilson.

Cc: Chris Wilson <[email protected]>
Cc: [email protected] (the regression was Cc: stable, too)
Signed-Off-by: Daniel Vetter <[email protected]>
---
 drivers/gpu/drm/i915/intel_display.c |    5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index fb05d9d..f4692f8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6257,10 +6257,11 @@ static void intel_sanitize_modesetting(struct 
drm_device *dev,
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
        u32 reg, val;
+       int i;
 
        /* Clear any frame start delays used for debugging left by the BIOS */
-       for_each_pipe(pipe) {
-               reg = PIPECONF(pipe);
+       for_each_pipe(i) {
+               reg = PIPECONF(i);
                I915_WRITE(reg, I915_READ(reg) & 
~PIPECONF_FRAME_START_DELAY_MASK);
        }
 
-- 
1.7.10

_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to