On Mon, Nov 07, 2016 at 10:20:57PM +0200, [email protected] wrote: > From: Ville Syrjälä <[email protected]> > > The code to determine the primary plane offset for gen2/3 looks > different than the code for gen4+, but in fact it's doing the same > thing. Let's make it uniform. Allows us to eliminate the 'obj' from > the list of local variables as well. > > Signed-off-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/intel_display.c | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 817ed3f320f7..3d519d701e1c 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3017,7 +3017,6 @@ static void i9xx_update_primary_plane(struct drm_plane > *primary, > struct drm_i915_private *dev_priv = to_i915(dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > struct drm_framebuffer *fb = plane_state->base.fb; > - struct drm_i915_gem_object *obj = intel_fb_obj(fb); > int plane = intel_crtc->plane; > u32 linear_offset; > u32 dspcntr; > @@ -3112,8 +3111,11 @@ static void i9xx_update_primary_plane(struct drm_plane > *primary, > intel_crtc->dspaddr_offset); > I915_WRITE(DSPTILEOFF(plane), (y << 16) | x); > I915_WRITE(DSPLINOFF(plane), linear_offset); > - } else > - I915_WRITE(DSPADDR(plane), i915_gem_object_ggtt_offset(obj, > NULL) + linear_offset); > + } else { > + I915_WRITE(DSPADDR(plane), > + intel_fb_gtt_offset(fb, rotation) + > + intel_crtc->dspaddr_offset);
Reviewed-by: Chris Wilson <[email protected]> Though the reader might notice the same offset being passed to both gen4+ DSPSURF and gen3- DSPADDR, and might reasonably ask if they should be sharing a variable. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
