I had this lying around and forgot to submit it. I feel it makes the forcewake stuff slightly cleaner, but this is only cosmetic.
Signed-off-by: Ben Widawsky <[email protected]> --- drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/gpu/drm/i915/i915_dma.c | 7 +++++++ drivers/gpu/drm/i915/i915_drv.c | 6 +++--- drivers/gpu/drm/i915/i915_drv.h | 27 ++++++++++++++++++--------- 4 files changed, 29 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 3c395a5..2c7c033 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1531,7 +1531,7 @@ static int i915_forcewake_open(struct inode *inode, struct file *file) struct drm_i915_private *dev_priv = dev->dev_private; int ret; - if (!IS_GEN6(dev)) + if (!dev_priv->forcewake.required) return 0; ret = mutex_lock_interruptible(&dev->struct_mutex); diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 8a3942c..19bb1e6 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -1916,6 +1916,13 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) goto free_priv; } + if (INTEL_INFO(dev)->gen >= 6) { + dev_priv->forcewake.needs_wake = gen6_needs_forcewake; + dev_priv->forcewake.required = true; + } else + dev_priv->forcewake.needs_wake = intel_needs_forcewake; + + /* overlay on gen2 is broken and can't address above 1G */ if (IS_GEN2(dev)) dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30)); diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index ce045a8..8c45401 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -377,7 +377,7 @@ void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv) { - if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) { + if (dev_priv->forcewake.gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) { int loop = 500; u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) { @@ -385,9 +385,9 @@ void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv) fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); } WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES); - dev_priv->gt_fifo_count = fifo; + dev_priv->forcewake.gt_fifo_count = fifo; } - dev_priv->gt_fifo_count--; + dev_priv->forcewake.gt_fifo_count--; } static int i915_drm_freeze(struct drm_device *dev) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7916bd9..98678ef 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -279,7 +279,12 @@ typedef struct drm_i915_private { int relative_constants_mode; void __iomem *regs; - u32 gt_fifo_count; + + struct intel_forcewake { + bool required; /* Does the GT have forcewake */ + bool (*needs_wake)(u32 reg); /* Does GT need awakening for reg */ + u32 gt_fifo_count; + } forcewake; struct intel_gmbus { struct i2c_adapter adapter; @@ -1339,6 +1344,16 @@ extern void intel_display_print_error_state(struct seq_file *m, LOCK_TEST_WITH_RETURN(dev, file); \ } while (0) +static inline bool intel_needs_forcewake(u32 reg) +{ + return false; +} + +static inline bool gen6_needs_forcewake(u32 reg) +{ + return !((reg > 0x40000) && reg != FORCEWAKE); +} + /* On SNB platform, before reading ring registers forcewake bit * must be set to prevent GT core from power down and stale values being * returned. @@ -1347,16 +1362,10 @@ void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv); void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv); void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv); -/* We give fast paths for the really cool registers */ -#define NEEDS_FORCE_WAKE(dev_priv, reg) \ - (((dev_priv)->info->gen >= 6) && \ - ((reg) < 0x40000) && \ - ((reg) != FORCEWAKE)) - #define __i915_read(x, y) \ static inline u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \ u##x val = 0; \ - if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \ + if (dev_priv->forcewake.needs_wake(reg)) { \ gen6_gt_force_wake_get(dev_priv); \ val = read##y(dev_priv->regs + reg); \ gen6_gt_force_wake_put(dev_priv); \ @@ -1376,7 +1385,7 @@ __i915_read(64, q) #define __i915_write(x, y) \ static inline void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \ trace_i915_reg_rw(true, reg, val, sizeof(val)); \ - if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \ + if (dev_priv->forcewake.needs_wake(reg)) { \ __gen6_gt_wait_for_fifo(dev_priv); \ } \ write##y(val, dev_priv->regs + reg); \ -- 1.7.6.1 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
