On 5 October 2016 at 10:41, Frank Kleinewoerdemann <[email protected]> wrote: > > I had a HackRF One with firmware version 2014.08.1 working with Linux, Android OTG as well as Windows gear.
Is 2014.08.1 the firmware that came on the device? > If I skip the CPLD update and press the reset button: LED 3V3 on, RF on, all others off. Power cycle gets me back to where I was after the first SPI flash. Whether you perform or skip the CPLD update shouldn't change anything, there were no CPLD changes between 2014.08 and 2015.07. > I put a logic analyzer on the exposed SPI pins (on the P20 header) and could observe that the binary data was present on the SPI during flash operation - plus blocks of [0xAB, 0xFF (times 4)] repeated 21 times plus what seems to be an incremental count value. The 0xAB command is to power down the flash, it should be happening at the end of the write process. > There is also SPI data after reset/reboot but it's not what was sent to the SPI flash and the clock signal in relation to MOSI/MISO looks rather odd (like misaligned...clock rising edge vs.stable level on MISO/MOSI). I can't tell though whether this is expected or not. What are the WP and HOLD lines doing while you measure this? > Please let me know if you have an idea what to do in order to get the device booting again without passing through the DFU mode. > Some hints as how the SPI data should look like after reset could be helpful as well.... Instead of using the logic analyzer, could you write firmware to flash from DFU mode (hackrf_spiflash -w <filename>) and then, without resetting, attempt to read it back using hackrf_spiflash -r <new_filename> ? Then compare those two files to find out if the data is being written to the flash correctly or not. Thanks, Dominic
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