вт, 25 сент. 2018 г. в 7:07, gevisz <gev...@gmail.com>: > > вс, 23 сент. 2018 г. в 10:10, Walter Dnes <waltd...@waltdnes.org>: > > > > On Thu, Sep 20, 2018 at 01:00:39AM +0300, gevisz wrote > > > ????, 19 ????????. 2018 ??. ?? 11:38, Walter Dnes <waltd...@waltdnes.org>: > > > > > > According to > > > > http://www.cpu-world.com/sspec/SL/SLA8Z.html it has... > > > > > > > > MMX SSE SSE2 SSE3 SSSE3 > > > > > > Do you mean that it would be enough to set > > > CFLAGS="-O2 -pipe mmx sse sse2 sse3 ssse3" > > > without setting the march cflag at all? > > > > Yes, that would work. Remember also to include in make.conf > > > > CPU_FLAGS_X86="mmx mmxext sse sse2 sse3 ssse3" > > The target processor does not support mmxext.
Strange enough but cpuid2cpuflags shows that it does: # cpuid2cpuflags CPU_FLAGS_X86: mmx mmxext sse sse2 sse3 ssse3 > > In your jpeg image, I see that the flags include mmx, sse, sse2, pni, > > and ssse3. "pni" == "Prescott New Instructions" == "SSE3". Looking at > > https://gcc.gnu.org/onlinedocs/gcc-7.3.0/gcc/x86-Options.html#x86-Options > > I suggest "-march=core2" with CPU_FLAGS_X86 same as above. The "core2" > > option uses MMX, SSE, SSE2, SSE3 and SSSE3 instructions, all of which > > show up in the listing on your jpeg. > > Thank you. Looking into https://wiki.gentoo.org/wiki/Safe_CFLAGS#Intel > I also concluded that for the target processor I should set "-march=core2" > but I did not know that core2 option is exactly equivalent to setting mmx, > sse, sse2, sse3 and ssse3 instructions. > > So, I decided to spend a day to get my hands on the target computer > and compile everything on it with "-march=native" no matter how much > time it takes. > > To conclude this thread, I will post the output of the commands > suggested in this thread later, after the system install will be finished, > just in case somebody will need them in the future.
