commit: 3b0058d27fa91793251fe5e8091e73c15de9cf84 Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> AuthorDate: Sat Sep 2 09:59:28 2023 +0000 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> CommitDate: Sat Sep 2 09:59:28 2023 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=3b0058d2
Linux patch 4.19.294 Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> 0000_README | 4 ++ 1293_linux-4.19.294.patch | 96 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 100 insertions(+) diff --git a/0000_README b/0000_README index a211d53c..49895006 100644 --- a/0000_README +++ b/0000_README @@ -1215,6 +1215,10 @@ Patch: 1292_linux-4.19.293.patch From: https://www.kernel.org Desc: Linux 4.19.293 +Patch: 1293_linux-4.19.294.patch +From: https://www.kernel.org +Desc: Linux 4.19.294 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1293_linux-4.19.294.patch b/1293_linux-4.19.294.patch new file mode 100644 index 00000000..e2074dd8 --- /dev/null +++ b/1293_linux-4.19.294.patch @@ -0,0 +1,96 @@ +diff --git a/Makefile b/Makefile +index 5965df0393fd3..4f8f98c7227a4 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + VERSION = 4 + PATCHLEVEL = 19 +-SUBLEVEL = 293 ++SUBLEVEL = 294 + EXTRAVERSION = + NAME = "People's Front" + +diff --git a/arch/arm/mach-ep93xx/timer-ep93xx.c b/arch/arm/mach-ep93xx/timer-ep93xx.c +index b07956883e165..de998830f534f 100644 +--- a/arch/arm/mach-ep93xx/timer-ep93xx.c ++++ b/arch/arm/mach-ep93xx/timer-ep93xx.c +@@ -9,7 +9,6 @@ + #include <linux/io.h> + #include <asm/mach/time.h> + #include "soc.h" +-#include "platform.h" + + /************************************************************************* + * Timer handling for EP93xx +@@ -61,7 +60,7 @@ static u64 notrace ep93xx_read_sched_clock(void) + return ret; + } + +-static u64 ep93xx_clocksource_read(struct clocksource *c) ++u64 ep93xx_clocksource_read(struct clocksource *c) + { + u64 ret; + +diff --git a/arch/mips/alchemy/common/dbdma.c b/arch/mips/alchemy/common/dbdma.c +index e9ee9ab90a0c6..4ca2c28878e0f 100644 +--- a/arch/mips/alchemy/common/dbdma.c ++++ b/arch/mips/alchemy/common/dbdma.c +@@ -30,7 +30,6 @@ + * + */ + +-#include <linux/dma-map-ops.h> /* for dma_default_coherent */ + #include <linux/init.h> + #include <linux/kernel.h> + #include <linux/slab.h> +@@ -624,18 +623,17 @@ u32 au1xxx_dbdma_put_source(u32 chanid, dma_addr_t buf, int nbytes, u32 flags) + dp->dscr_cmd0 &= ~DSCR_CMD0_IE; + + /* +- * There is an erratum on certain Au1200/Au1550 revisions that could +- * result in "stale" data being DMA'ed. It has to do with the snoop +- * logic on the cache eviction buffer. dma_default_coherent is set +- * to false on these parts. ++ * There is an errata on the Au1200/Au1550 parts that could result ++ * in "stale" data being DMA'ed. It has to do with the snoop logic on ++ * the cache eviction buffer. DMA_NONCOHERENT is on by default for ++ * these parts. If it is fixed in the future, these dma_cache_inv will ++ * just be nothing more than empty macros. See io.h. + */ +- if (!dma_default_coherent) +- dma_cache_wback_inv(KSEG0ADDR(buf), nbytes); ++ dma_cache_wback_inv((unsigned long)buf, nbytes); + dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ + wmb(); /* drain writebuffer */ + dma_cache_wback_inv((unsigned long)dp, sizeof(*dp)); + ctp->chan_ptr->ddma_dbell = 0; +- wmb(); /* force doorbell write out to dma engine */ + + /* Get next descriptor pointer. */ + ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); +@@ -687,18 +685,17 @@ u32 au1xxx_dbdma_put_dest(u32 chanid, dma_addr_t buf, int nbytes, u32 flags) + dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1); + #endif + /* +- * There is an erratum on certain Au1200/Au1550 revisions that could +- * result in "stale" data being DMA'ed. It has to do with the snoop +- * logic on the cache eviction buffer. dma_default_coherent is set +- * to false on these parts. ++ * There is an errata on the Au1200/Au1550 parts that could result in ++ * "stale" data being DMA'ed. It has to do with the snoop logic on the ++ * cache eviction buffer. DMA_NONCOHERENT is on by default for these ++ * parts. If it is fixed in the future, these dma_cache_inv will just ++ * be nothing more than empty macros. See io.h. + */ +- if (!dma_default_coherent) +- dma_cache_inv(KSEG0ADDR(buf), nbytes); ++ dma_cache_inv((unsigned long)buf, nbytes); + dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ + wmb(); /* drain writebuffer */ + dma_cache_wback_inv((unsigned long)dp, sizeof(*dp)); + ctp->chan_ptr->ddma_dbell = 0; +- wmb(); /* force doorbell write out to dma engine */ + + /* Get next descriptor pointer. */ + ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
