commit: 922354b18748e172bacd9ab5d7d97b3324ca85c5
Author: Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Sun Aug 29 16:58:48 2021 +0000
Commit: Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Sun Aug 29 17:04:58 2021 +0000
URL: https://gitweb.gentoo.org/proj/releng.git/commit/?id=922354b1
Enable armv5tel builds on jiji
Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>
.../specs/arm/armv5tel/{stage1.spec => stage1-openrc.spec} | 4 ++--
.../specs/arm/armv5tel/{stage3.spec => stage3-openrc.spec} | 4 ++--
tools/catalyst-auto-arm.conf | 12 ++++++------
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/releases/specs/arm/armv5tel/stage1.spec
b/releases/specs/arm/armv5tel/stage1-openrc.spec
similarity index 74%
rename from releases/specs/arm/armv5tel/stage1.spec
rename to releases/specs/arm/armv5tel/stage1-openrc.spec
index b6fbe506..666a0cdc 100644
--- a/releases/specs/arm/armv5tel/stage1.spec
+++ b/releases/specs/arm/armv5tel/stage1-openrc.spec
@@ -1,10 +1,10 @@
subarch: armv5tel
-version_stamp: @TIMESTAMP@
+version_stamp: openrc-@TIMESTAMP@
target: stage1
rel_type: default
profile: default/linux/arm/17.0/armv5te
snapshot: @TIMESTAMP@
-source_subpath: default/stage3-armv5tel-latest
+source_subpath: default/stage3-armv5tel-openrc-latest
compression_mode: pixz_x
update_seed: yes
update_seed_command: -uDN @world
diff --git a/releases/specs/arm/armv5tel/stage3.spec
b/releases/specs/arm/armv5tel/stage3-openrc.spec
similarity index 69%
rename from releases/specs/arm/armv5tel/stage3.spec
rename to releases/specs/arm/armv5tel/stage3-openrc.spec
index 98eb714d..51f0f282 100644
--- a/releases/specs/arm/armv5tel/stage3.spec
+++ b/releases/specs/arm/armv5tel/stage3-openrc.spec
@@ -1,10 +1,10 @@
subarch: armv5tel
-version_stamp: @TIMESTAMP@
+version_stamp: openrc-@TIMESTAMP@
target: stage3
rel_type: default
profile: default/linux/arm/17.0/armv5te
snapshot: @TIMESTAMP@
-source_subpath: default/stage1-armv5tel-@TIMESTAMP@
+source_subpath: default/stage1-armv5tel-openrc-@TIMESTAMP@
compression_mode: pixz_x
portage_confdir: @REPO_DIR@/releases/portage/stages
portage_prefix: releng
diff --git a/tools/catalyst-auto-arm.conf b/tools/catalyst-auto-arm.conf
index 0dccfbbb..b6603745 100644
--- a/tools/catalyst-auto-arm.conf
+++ b/tools/catalyst-auto-arm.conf
@@ -2,7 +2,7 @@
# self-explanatory.
UPLOAD_USER=arm
-UPLOAD_KEY=/root/.ssh/id_rsa
+UPLOAD_KEY=/root/.ssh/id_ed25519
host=$(hostname)
@@ -13,14 +13,14 @@ EMAIL_SUBJECT_PREPEND="[arm-auto]"
SETS="
armv4tl_openrc
armv4tl_systemd
+ armv5tel_openrc
+ armv5tel_systemd
"
-# armv5tel
# armv6j_hf
# armv6j_sf
# armv7a_hf
# armv7a_sf
-# armv5tel_systemd
# armv6j_hf_systemd
# armv6j_sf_systemd
# armv7a_hf_systemd
@@ -30,7 +30,7 @@ SETS="
SET_armv4tl_openrc_SPECS="armv4tl/stage1-openrc.spec
armv4tl/stage3-openrc.spec"
SET_armv4tl_systemd_SPECS="armv4tl/stage1-systemd.spec
armv4tl/stage3-systemd.spec"
-SET_armv5tel_SPECS="armv5tel/stage1.spec armv5tel/stage3.spec"
+SET_armv5tel_openrc_SPECS="armv5tel/stage1-openrc.spec
armv5tel/stage3-openrc.spec"
SET_armv5tel_systemd_SPECS="armv5tel/stage1-systemd.spec
armv5tel/stage3-systemd.spec"
SET_armv6j_hf_SPECS="armv6j/stage1-hardfloat.spec armv6j/stage3-hardfloat.spec"
@@ -69,8 +69,8 @@ post_build() {
armv4tl/stage3-systemd.spec)
upload stage3-armv4tl-systemd-${TIMESTAMP}*.xz*
;;
- armv5tel/stage3.spec)
- upload stage3-armv5tel-${TIMESTAMP}*.xz*
+ armv5tel/stage3-openrc.spec)
+ upload stage3-armv5tel-openrc-${TIMESTAMP}*.xz*
;;
armv5tel/stage3-systemd.spec)
upload stage3-armv5tel-systemd-${TIMESTAMP}*.xz*
