commit: 44d1f17507e3f2a5ff448399f4ed6db9f74a15db
Author: Andrew Ammerlaan <andrewammerlaan <AT> riseup <DOT> net>
AuthorDate: Sun Mar 15 11:28:07 2020 +0000
Commit: Andrew Ammerlaan <andrewammerlaan <AT> riseup <DOT> net>
CommitDate: Sun Mar 15 11:28:07 2020 +0000
URL: https://gitweb.gentoo.org/repo/proj/guru.git/commit/?id=44d1f175
sci-electronics/verilator: remove proxy-maint from metadata
Package-Manager: Portage-2.3.93, Repoman-2.3.20
Signed-off-by: Andrew Ammerlaan <andrewammerlaan <AT> riseup.net>
sci-electronics/verilator/metadata.xml | 4 ----
1 file changed, 4 deletions(-)
diff --git a/sci-electronics/verilator/metadata.xml
b/sci-electronics/verilator/metadata.xml
index 94cd7b4..626ddc8 100644
--- a/sci-electronics/verilator/metadata.xml
+++ b/sci-electronics/verilator/metadata.xml
@@ -5,10 +5,6 @@
<email>[email protected]</email>
<name>Huang Rui</name>
</maintainer>
- <maintainer type="project">
- <email>[email protected]</email>
- <name>Proxy Maintainers</name>
- </maintainer>
<longdescription>
Verilator, the fastest free Verilog HDL simulator.
Accepts synthesizable Verilog or SystemVerilog
