commit: dedb706a5e6c04262f2a13963797024452431ed0 Author: xdch47 <xdch47 <AT> posteo <DOT> de> AuthorDate: Fri Jan 19 12:49:02 2018 +0000 Commit: David Seifert <soap <AT> gentoo <DOT> org> CommitDate: Fri Jan 26 21:36:05 2018 +0000 URL: https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=dedb706a
sci-electronics/iverilog: Version bump to 10.2 Closes: https://bugs.gentoo.org/563086 Closes: https://bugs.gentoo.org/645340 Package-Manager: Portage-2.3.13, Repoman-2.3.3 Closes: https://github.com/gentoo/gentoo/pull/6906 sci-electronics/iverilog/Manifest | 1 + sci-electronics/iverilog/iverilog-10.2.ebuild | 32 +++++++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/sci-electronics/iverilog/Manifest b/sci-electronics/iverilog/Manifest index 88e0a07dffd..2459fd7d45c 100644 --- a/sci-electronics/iverilog/Manifest +++ b/sci-electronics/iverilog/Manifest @@ -1,2 +1,3 @@ DIST verilog-0.9.6.tar.gz 1219982 BLAKE2B 12f7dfb1ab8b7e4524cf0a3061ce801bfa741015fc1446aef7ffe51c42d76b5d0578e78ce13cd8c3fb6bac580e9da1ed11ca03e1fd02f8cb75dd74425546f851 SHA512 63c18f211eb9711547db65b859551063129cf18acb1196eaa88562f194231079fe929a6f7b8fbe2160863c521f02dde079e792f1b0bbe1c2514deafd55d5288c DIST verilog-0.9.7.tar.gz 1238088 BLAKE2B c0b173b4857abc0d35ad05d9f11d5265763c92e625aadb1b487978c40e0679725b8e6de0fc05cc8e4bc7a6db6e1d9abacf886942b05e27d8513b9586cca156f9 SHA512 1a81f132c667f5cd33a11156364a366806ef9b6ef59b86f69df852af79cc92db17df8db0bace4e3c14929b0110df0aa7d83f35f664057e715842acf7bd21c1f5 +DIST verilog-10.2.tar.gz 1695227 BLAKE2B ea2488de55ef60a248e7f5ffd5e06c6d86d57f3cff4536cb64a727ab70d8868847e53beec093e21243a1e81ede021b0ccde771d66ce1d986f737b5d925aaff11 SHA512 21e0861ee994daf0a98d0da3e0ad665e37cba4669faa873ae57d05eb41794b6cc2948c88cc07ebe1e9266850ad2bad189096ae6911b9c4064f772279d0901aef diff --git a/sci-electronics/iverilog/iverilog-10.2.ebuild b/sci-electronics/iverilog/iverilog-10.2.ebuild new file mode 100644 index 00000000000..adcc651fe35 --- /dev/null +++ b/sci-electronics/iverilog/iverilog-10.2.ebuild @@ -0,0 +1,32 @@ +# Copyright 1999-2018 Gentoo Foundation +# Distributed under the terms of the GNU General Public License v2 + +EAPI=6 + +DESCRIPTION="A Verilog simulation and synthesis tool" +SRC_URI="ftp://icarus.com/pub/eda/verilog/v${PV:0:2}/verilog-${PV}.tar.gz"; +HOMEPAGE="http://iverilog.icarus.com/"; + +LICENSE="GPL-2" +SLOT="0" +KEYWORDS="~amd64 ~ppc ~sparc ~x86" +IUSE="examples" + +RDEPEND=" + app-arch/bzip2 + sys-libs/readline:0= + sys-libs/zlib:=" +DEPEND="${RDEPEND}" + +S="${WORKDIR}/${P#i}" + +src_install() { + emake -j1 DESTDIR="${D}" install + einstalldocs + dodoc *.txt + + if use examples; then + dodoc -r examples + docompress -x /usr/share/doc/${PF}/examples + fi +}
