commit: e1f8ec8bf05c1175f67f3e0a328dea01cb2bafc3 Author: Matt Jolly <kangie <AT> gentoo <DOT> org> AuthorDate: Wed Mar 11 07:42:03 2026 +0000 Commit: Matt Jolly <kangie <AT> gentoo <DOT> org> CommitDate: Wed Mar 11 07:52:21 2026 +0000 URL: https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=e1f8ec8b
net-libs/nodejs: 24.11.1: fix build on ppc64 Closes: https://bugs.gentoo.org/971054 Signed-off-by: Matt Jolly <kangie <AT> gentoo.org> .../nodejs/files/nodejs-24.11.1-gcc15-ppc.patch | 257 +++++++++++++++++++++ .../files/nodejs-24.11.1-restore-ppc64be.patch | 109 +++++++++ net-libs/nodejs/nodejs-24.11.1-r1.ebuild | 7 + 3 files changed, 373 insertions(+) diff --git a/net-libs/nodejs/files/nodejs-24.11.1-gcc15-ppc.patch b/net-libs/nodejs/files/nodejs-24.11.1-gcc15-ppc.patch new file mode 100644 index 000000000000..0d0f65b8820a --- /dev/null +++ b/net-libs/nodejs/files/nodejs-24.11.1-gcc15-ppc.patch @@ -0,0 +1,257 @@ +https://bugs.gentoo.org/971054 / https://github.com/google/highway/commit/dcc0ca1cd4245ecff9e5ba50818e47d5e2ccf699 +From: John Platts <[email protected]> +Date: Fri, 17 Jan 2025 12:16:49 -0600 +Subject: [PATCH] Fix for GCC 15 compiler error on PPC8/PPC9/PPC10 + +--- a/deps/v8/third_party/highway/src/hwy/ops/ppc_vsx-inl.h ++++ b/deps/v8/third_party/highway/src/hwy/ops/ppc_vsx-inl.h +@@ -3701,16 +3701,73 @@ static HWY_INLINE V VsxF2INormalizeSrcVals(V v) { + #endif + } + ++template <class VF32> ++static HWY_INLINE HWY_MAYBE_UNUSED VFromD<Repartition<int64_t, DFromV<VF32>>> ++VsxXvcvspsxds(VF32 vf32) { ++ using VI64 = VFromD<Repartition<int64_t, DFromV<VF32>>>; ++#if (HWY_COMPILER_GCC_ACTUAL && HWY_COMPILER_GCC_ACTUAL < 1500) || \ ++ HWY_HAS_BUILTIN(__builtin_vsx_xvcvspsxds) ++ // Use __builtin_vsx_xvcvspsxds if it is available (which is the case with ++ // GCC 4.8 through GCC 14 or Clang 13 or later on PPC8/PPC9/PPC10) ++ return VI64{__builtin_vsx_xvcvspsxds(vf32.raw)}; ++#elif HWY_COMPILER_GCC_ACTUAL >= 1500 && HWY_IS_LITTLE_ENDIAN ++ // On little-endian PPC8/PPC9/PPC10 with GCC 15 or later, use the F32->I64 ++ // vec_signedo intrinsic as the __builtin_vsx_xvcvspsxds intrinsic has been ++ // removed from GCC in GCC 15 ++ return VI64{vec_signedo(vf32.raw)}; ++#elif HWY_COMPILER_GCC_ACTUAL >= 1500 && HWY_IS_BIG_ENDIAN ++ // On big-endian PPC8/PPC9/PPC10 with GCC 15 or later, use the F32->I64 ++ // vec_signede intrinsic as the __builtin_vsx_xvcvspsxds intrinsic has been ++ // removed from GCC in GCC 15 ++ return VI64{vec_signede(vf32.raw)}; ++#else ++ // Inline assembly fallback for older versions of Clang that do not have the ++ // __builtin_vsx_xvcvspsxds intrinsic ++ __vector signed long long raw_result; ++ __asm__("xvcvspsxds %x0, %x1" : "=wa"(raw_result) : "wa"(vf32.raw) :); ++ return VI64{raw_result}; ++#endif ++} ++ ++template <class VF32> ++static HWY_INLINE HWY_MAYBE_UNUSED VFromD<Repartition<uint64_t, DFromV<VF32>>> ++VsxXvcvspuxds(VF32 vf32) { ++ using VU64 = VFromD<Repartition<uint64_t, DFromV<VF32>>>; ++#if (HWY_COMPILER_GCC_ACTUAL && HWY_COMPILER_GCC_ACTUAL < 1500) || \ ++ HWY_HAS_BUILTIN(__builtin_vsx_xvcvspuxds) ++ // Use __builtin_vsx_xvcvspuxds if it is available (which is the case with ++ // GCC 4.8 through GCC 14 or Clang 13 or later on PPC8/PPC9/PPC10) ++ return VU64{reinterpret_cast<__vector unsigned long long>( ++ __builtin_vsx_xvcvspuxds(vf32.raw))}; ++#elif HWY_COMPILER_GCC_ACTUAL >= 1500 && HWY_IS_LITTLE_ENDIAN ++ // On little-endian PPC8/PPC9/PPC10 with GCC 15 or later, use the F32->U64 ++ // vec_unsignedo intrinsic as the __builtin_vsx_xvcvspuxds intrinsic has been ++ // removed from GCC in GCC 15 ++ return VU64{vec_unsignedo(vf32.raw)}; ++#elif HWY_COMPILER_GCC_ACTUAL >= 1500 && HWY_IS_BIG_ENDIAN ++ // On big-endian PPC8/PPC9/PPC10 with GCC 15 or later, use the F32->U64 ++ // vec_unsignedo intrinsic as the __builtin_vsx_xvcvspuxds intrinsic has been ++ // removed from GCC in GCC 15 ++ return VU64{vec_unsignede(vf32.raw)}; ++#else ++ // Inline assembly fallback for older versions of Clang that do not have the ++ // __builtin_vsx_xvcvspuxds intrinsic ++ __vector unsigned long long raw_result; ++ __asm__("xvcvspuxds %x0, %x1" : "=wa"(raw_result) : "wa"(vf32.raw) :); ++ return VU64{raw_result}; ++#endif ++} ++ + } // namespace detail + #endif // !HWY_S390X_HAVE_Z14 + + template <class D, HWY_IF_I64_D(D)> + HWY_API VFromD<D> PromoteTo(D di64, VFromD<Rebind<float, D>> v) { +-#if !HWY_S390X_HAVE_Z14 && \ +- (HWY_COMPILER_GCC_ACTUAL || HWY_HAS_BUILTIN(__builtin_vsx_xvcvspsxds)) +- const __vector float raw_v = +- detail::VsxF2INormalizeSrcVals(InterleaveLower(v, v)).raw; +- return VFromD<decltype(di64)>{__builtin_vsx_xvcvspsxds(raw_v)}; ++#if !HWY_S390X_HAVE_Z14 ++ const Repartition<float, decltype(di64)> dt_f32; ++ const auto vt_f32 = ResizeBitCast(dt_f32, v); ++ return detail::VsxXvcvspsxds( ++ detail::VsxF2INormalizeSrcVals(InterleaveLower(vt_f32, vt_f32))); + #else + const RebindToFloat<decltype(di64)> df64; + return ConvertTo(di64, PromoteTo(df64, v)); +@@ -3719,12 +3776,11 @@ HWY_API VFromD<D> PromoteTo(D di64, VFromD<Rebind<float, D>> v) { + + template <class D, HWY_IF_U64_D(D)> + HWY_API VFromD<D> PromoteTo(D du64, VFromD<Rebind<float, D>> v) { +-#if !HWY_S390X_HAVE_Z14 && \ +- (HWY_COMPILER_GCC_ACTUAL || HWY_HAS_BUILTIN(__builtin_vsx_xvcvspuxds)) +- const __vector float raw_v = +- detail::VsxF2INormalizeSrcVals(InterleaveLower(v, v)).raw; +- return VFromD<decltype(du64)>{reinterpret_cast<__vector unsigned long long>( +- __builtin_vsx_xvcvspuxds(raw_v))}; ++#if !HWY_S390X_HAVE_Z14 ++ const Repartition<float, decltype(du64)> dt_f32; ++ const auto vt_f32 = ResizeBitCast(dt_f32, v); ++ return detail::VsxXvcvspuxds( ++ detail::VsxF2INormalizeSrcVals(InterleaveLower(vt_f32, vt_f32))); + #else + const RebindToFloat<decltype(du64)> df64; + return ConvertTo(du64, PromoteTo(df64, v)); +@@ -3829,12 +3885,10 @@ HWY_API VFromD<D> PromoteUpperTo(D df64, Vec128<uint32_t> v) { + + template <class D, HWY_IF_V_SIZE_D(D, 16), HWY_IF_I64_D(D)> + HWY_API VFromD<D> PromoteUpperTo(D di64, Vec128<float> v) { +-#if !HWY_S390X_HAVE_Z14 && \ +- (HWY_COMPILER_GCC_ACTUAL || HWY_HAS_BUILTIN(__builtin_vsx_xvcvspsxds)) +- const __vector float raw_v = +- detail::VsxF2INormalizeSrcVals(InterleaveUpper(Full128<float>(), v, v)) +- .raw; +- return VFromD<decltype(di64)>{__builtin_vsx_xvcvspsxds(raw_v)}; ++#if !HWY_S390X_HAVE_Z14 ++ (void)di64; ++ return detail::VsxXvcvspsxds( ++ detail::VsxF2INormalizeSrcVals(InterleaveUpper(Full128<float>(), v, v))); + #else + const RebindToFloat<decltype(di64)> df64; + return ConvertTo(di64, PromoteUpperTo(df64, v)); +@@ -3843,13 +3897,10 @@ HWY_API VFromD<D> PromoteUpperTo(D di64, Vec128<float> v) { + + template <class D, HWY_IF_V_SIZE_D(D, 16), HWY_IF_U64_D(D)> + HWY_API VFromD<D> PromoteUpperTo(D du64, Vec128<float> v) { +-#if !HWY_S390X_HAVE_Z14 && \ +- (HWY_COMPILER_GCC_ACTUAL || HWY_HAS_BUILTIN(__builtin_vsx_xvcvspuxds)) +- const __vector float raw_v = +- detail::VsxF2INormalizeSrcVals(InterleaveUpper(Full128<float>(), v, v)) +- .raw; +- return VFromD<decltype(du64)>{reinterpret_cast<__vector unsigned long long>( +- __builtin_vsx_xvcvspuxds(raw_v))}; ++#if !HWY_S390X_HAVE_Z14 ++ (void)du64; ++ return detail::VsxXvcvspuxds( ++ detail::VsxF2INormalizeSrcVals(InterleaveUpper(Full128<float>(), v, v))); + #else + const RebindToFloat<decltype(du64)> df64; + return ConvertTo(du64, PromoteUpperTo(df64, v)); +@@ -3937,20 +3988,18 @@ HWY_INLINE VFromD<D> PromoteEvenTo(hwy::SignedTag /*to_type_tag*/, + hwy::SizeTag<8> /*to_lane_size_tag*/, + hwy::FloatTag /*from_type_tag*/, D d_to, + V v) { +-#if !HWY_S390X_HAVE_Z14 && \ +- (HWY_COMPILER_GCC_ACTUAL || HWY_HAS_BUILTIN(__builtin_vsx_xvcvspsxds)) ++#if !HWY_S390X_HAVE_Z14 + (void)d_to; + const auto normalized_v = detail::VsxF2INormalizeSrcVals(v); + #if HWY_IS_LITTLE_ENDIAN +- // __builtin_vsx_xvcvspsxds expects the source values to be in the odd lanes +- // on little-endian PPC, and the vec_sld operation below will shift the even ++ // VsxXvcvspsxds expects the source values to be in the odd lanes on ++ // little-endian PPC, and the Shuffle2103 operation below will shift the even + // lanes of normalized_v into the odd lanes. +- return VFromD<D>{ +- __builtin_vsx_xvcvspsxds(vec_sld(normalized_v.raw, normalized_v.raw, 4))}; ++ return VsxXvcvspsxds(Shuffle2103(normalized_v)); + #else +- // __builtin_vsx_xvcvspsxds expects the source values to be in the even lanes +- // on big-endian PPC. +- return VFromD<D>{__builtin_vsx_xvcvspsxds(normalized_v.raw)}; ++ // VsxXvcvspsxds expects the source values to be in the even lanes on ++ // big-endian PPC. ++ return VsxXvcvspsxds(normalized_v); + #endif + #else + const RebindToFloat<decltype(d_to)> df64; +@@ -3965,22 +4014,18 @@ HWY_INLINE VFromD<D> PromoteEvenTo(hwy::UnsignedTag /*to_type_tag*/, + hwy::SizeTag<8> /*to_lane_size_tag*/, + hwy::FloatTag /*from_type_tag*/, D d_to, + V v) { +-#if !HWY_S390X_HAVE_Z14 && \ +- (HWY_COMPILER_GCC_ACTUAL || HWY_HAS_BUILTIN(__builtin_vsx_xvcvspuxds)) ++#if !HWY_S390X_HAVE_Z14 + (void)d_to; + const auto normalized_v = detail::VsxF2INormalizeSrcVals(v); + #if HWY_IS_LITTLE_ENDIAN +- // __builtin_vsx_xvcvspuxds expects the source values to be in the odd lanes +- // on little-endian PPC, and the vec_sld operation below will shift the even +- // lanes of normalized_v into the odd lanes. +- return VFromD<D>{ +- reinterpret_cast<__vector unsigned long long>(__builtin_vsx_xvcvspuxds( +- vec_sld(normalized_v.raw, normalized_v.raw, 4)))}; ++ // VsxXvcvspuxds expects the source values to be in the odd lanes ++ // on little-endian PPC, and the Shuffle2103 operation below will shift the ++ // even lanes of normalized_v into the odd lanes. ++ return VsxXvcvspuxds(Shuffle2103(normalized_v)); + #else +- // __builtin_vsx_xvcvspuxds expects the source values to be in the even lanes ++ // VsxXvcvspuxds expects the source values to be in the even lanes + // on big-endian PPC. +- return VFromD<D>{reinterpret_cast<__vector unsigned long long>( +- __builtin_vsx_xvcvspuxds(normalized_v.raw))}; ++ return VsxXvcvspuxds(normalized_v); + #endif + #else + const RebindToFloat<decltype(d_to)> df64; +@@ -4022,20 +4067,18 @@ HWY_INLINE VFromD<D> PromoteOddTo(hwy::SignedTag /*to_type_tag*/, + hwy::SizeTag<8> /*to_lane_size_tag*/, + hwy::FloatTag /*from_type_tag*/, D d_to, + V v) { +-#if !HWY_S390X_HAVE_Z14 && \ +- (HWY_COMPILER_GCC_ACTUAL || HWY_HAS_BUILTIN(__builtin_vsx_xvcvspsxds)) ++#if !HWY_S390X_HAVE_Z14 + (void)d_to; + const auto normalized_v = detail::VsxF2INormalizeSrcVals(v); + #if HWY_IS_LITTLE_ENDIAN +- // __builtin_vsx_xvcvspsxds expects the source values to be in the odd lanes ++ // VsxXvcvspsxds expects the source values to be in the odd lanes + // on little-endian PPC +- return VFromD<D>{__builtin_vsx_xvcvspsxds(normalized_v.raw)}; ++ return VsxXvcvspsxds(normalized_v); + #else +- // __builtin_vsx_xvcvspsxds expects the source values to be in the even lanes +- // on big-endian PPC, and the vec_sld operation below will shift the odd lanes +- // of normalized_v into the even lanes. +- return VFromD<D>{ +- __builtin_vsx_xvcvspsxds(vec_sld(normalized_v.raw, normalized_v.raw, 4))}; ++ // VsxXvcvspsxds expects the source values to be in the even lanes ++ // on big-endian PPC, and the Shuffle0321 operation below will shift the odd ++ // lanes of normalized_v into the even lanes. ++ return VsxXvcvspsxds(Shuffle0321(normalized_v)); + #endif + #else + const RebindToFloat<decltype(d_to)> df64; +@@ -4050,22 +4093,18 @@ HWY_INLINE VFromD<D> PromoteOddTo(hwy::UnsignedTag /*to_type_tag*/, + hwy::SizeTag<8> /*to_lane_size_tag*/, + hwy::FloatTag /*from_type_tag*/, D d_to, + V v) { +-#if !HWY_S390X_HAVE_Z14 && \ +- (HWY_COMPILER_GCC_ACTUAL || HWY_HAS_BUILTIN(__builtin_vsx_xvcvspuxds)) ++#if !HWY_S390X_HAVE_Z14 + (void)d_to; + const auto normalized_v = detail::VsxF2INormalizeSrcVals(v); + #if HWY_IS_LITTLE_ENDIAN +- // __builtin_vsx_xvcvspuxds expects the source values to be in the odd lanes ++ // VsxXvcvspuxds expects the source values to be in the odd lanes + // on little-endian PPC +- return VFromD<D>{reinterpret_cast<__vector unsigned long long>( +- __builtin_vsx_xvcvspuxds(normalized_v.raw))}; ++ return VsxXvcvspuxds(normalized_v); + #else +- // __builtin_vsx_xvcvspuxds expects the source values to be in the even lanes +- // on big-endian PPC, and the vec_sld operation below will shift the odd lanes +- // of normalized_v into the even lanes. +- return VFromD<D>{ +- reinterpret_cast<__vector unsigned long long>(__builtin_vsx_xvcvspuxds( +- vec_sld(normalized_v.raw, normalized_v.raw, 4)))}; ++ // VsxXvcvspuxds expects the source values to be in the even lanes ++ // on big-endian PPC, and the Shuffle0321 operation below will shift the odd ++ // lanes of normalized_v into the even lanes. ++ return VsxXvcvspuxds(Shuffle0321(normalized_v)); + #endif + #else + const RebindToFloat<decltype(d_to)> df64; +-- +2.52.0 diff --git a/net-libs/nodejs/files/nodejs-24.11.1-restore-ppc64be.patch b/net-libs/nodejs/files/nodejs-24.11.1-restore-ppc64be.patch new file mode 100644 index 000000000000..f778e89b5191 --- /dev/null +++ b/net-libs/nodejs/files/nodejs-24.11.1-restore-ppc64be.patch @@ -0,0 +1,109 @@ +https://bugs.gentoo.org/971054 +From: Marcus Comstedt <[email protected]> +Date: Wed, 6 Jan 2021 13:51:28 +0100 +Subject: [PATCH 1/3] Restrict range of random addresses on big endian PPC64 + +--- a/deps/v8/src/base/platform/platform-posix.cc ++++ b/deps/v8/src/base/platform/platform-posix.cc +@@ -372,6 +372,9 @@ void* OS::GetRandomMmapAddr() { + raw_addr &= uint64_t{0x3FFFF000}; + // Use extra address space to isolate the mmap regions. + raw_addr += uint64_t{0x400000000000}; ++#elif V8_TARGET_BIG_ENDIAN ++ // Big-endian Linux: 42 bits of virtual addressing. ++ raw_addr &= uint64_t{0x03FFFFFF0000}; + #else + // Little-endian Linux: 46 bits of virtual addressing. + raw_addr &= uint64_t{0x3FFFFFFF0000}; +-- +2.52.0 + + +From f1cd67ed2bb7ef682609cbc271b9fa87f65aa118 Mon Sep 17 00:00:00 2001 +From: Marcus Comstedt <[email protected]> +Date: Tue, 4 Jul 2023 18:23:41 +0200 +Subject: [PATCH 2/3] Use AIX calling conventions also for Linux with ELFv1 + +--- a/deps/v8/src/heap/base/asm/ppc/push_registers_asm.cc ++++ b/deps/v8/src/heap/base/asm/ppc/push_registers_asm.cc +@@ -16,9 +16,22 @@ + + // AIX Runtime process stack: + // https://www.ibm.com/support/knowledgecenter/ssw_aix_71/assembler/idalangref_runtime_process.html ++ ++#include "src/codegen/ppc/constants-ppc.h" ++ + asm( ++#if ABI_USES_FUNCTION_DESCRIPTORS + #if defined(_AIX) + ".csect .text[PR] \n" ++#else ++ /* Linux linker requires the function descriptor to be provided */ ++ ".section \".opd\",\"aw\" \n" ++ ".align 3 \n" ++ ".globl PushAllRegistersAndIterateStack, hidden \n" ++ "PushAllRegistersAndIterateStack: \n" ++ ".quad .PushAllRegistersAndIterateStack,.TOC.@tocbase,0 \n" ++ ".text \n" ++#endif + ".align 2 \n" + ".globl .PushAllRegistersAndIterateStack, hidden \n" + ".PushAllRegistersAndIterateStack: \n" +@@ -36,7 +49,7 @@ asm( + // At anytime, SP (r1) needs to be multiple of 16 (i.e. 16-aligned). + " mflr 0 \n" + " std 0, 16(1) \n" +-#if defined(_AIX) ++#if ABI_USES_FUNCTION_DESCRIPTORS + " std 2, 40(1) \n" + #else + " std 2, 24(1) \n" +@@ -64,7 +77,7 @@ asm( + // Pass 2nd parameter (r4) unchanged (StackVisitor*). + // Save 3rd parameter (r5; IterateStackCallback). + " mr 6, 5 \n" +-#if defined(_AIX) ++#if ABI_USES_FUNCTION_DESCRIPTORS + // Set up TOC for callee. + " ld 2,8(5) \n" + // AIX uses function descriptors, which means that +@@ -75,7 +88,7 @@ asm( + #endif + // Pass 3rd parameter as sp (stack pointer). + " mr 5, 1 \n" +-#if !defined(_AIX) ++#if !ABI_USES_FUNCTION_DESCRIPTORS + // Set up r12 to be equal to the callee address (in order for TOC + // relocation). Only needed on LE Linux. + " mr 12, 6 \n" +@@ -88,7 +101,7 @@ asm( + // Restore lr. + " ld 0, 16(1) \n" + " mtlr 0 \n" +-#if defined(_AIX) ++#if ABI_USES_FUNCTION_DESCRIPTORS + // Restore TOC pointer. + " ld 2, 40(1) \n" + #else +-- +2.52.0 + + +From 06dfa8798dd4b6d42fb323b86a1a6581d5d9af07 Mon Sep 17 00:00:00 2001 +From: Marcus Comstedt <[email protected]> +Date: Thu, 17 Jul 2025 22:32:38 +0200 +Subject: [PATCH 3/3] Define V8_TARGET_BIG_ENDIAN for linux/ppc64 + +--- a/deps/v8/include/v8config.h ++++ b/deps/v8/include/v8config.h +@@ -976,7 +976,7 @@ V8 shared library set USING_V8_SHARED. + #define V8_TARGET_LITTLE_ENDIAN 1 + #endif + #elif V8_TARGET_ARCH_PPC64 +-#if V8_OS_AIX ++#if defined(__BIG_ENDIAN__) || defined(V8_OS_AIX) + #define V8_TARGET_BIG_ENDIAN 1 + #else + #define V8_TARGET_LITTLE_ENDIAN 1 +-- +2.52.0 diff --git a/net-libs/nodejs/nodejs-24.11.1-r1.ebuild b/net-libs/nodejs/nodejs-24.11.1-r1.ebuild index 5be6d67594b9..fd0163e595f1 100644 --- a/net-libs/nodejs/nodejs-24.11.1-r1.ebuild +++ b/net-libs/nodejs/nodejs-24.11.1-r1.ebuild @@ -117,6 +117,13 @@ src_prepare() { use pax-kernel && PATCHES+=( "${FILESDIR}"/${PN}-24.1.0-paxmarking.patch ) + if use ppc64; then + PATCHES+=( + "${FILESDIR}/${PN}-24.11.1-gcc15-ppc.patch" + "${FILESDIR}/${PN}-24.11.1-restore-ppc64be.patch" + ) + fi + default }
