commit:     6c586d9ad17fd9d1a2752b3dbd8d86bfd5f84cec
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Mon Mar 17 08:33:59 2025 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Mon Mar 17 08:35:46 2025 +0000
URL:        https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=6c586d9a

sys-libs/glibc: keyword 2.40-r9

Patchset changelog 2.40-8..2.40-9
7338afe69a (HEAD -> gentoo/2.40, tag: gentoo/glibc-2.40-9, gentoo/gentoo/2.40) 
nptl: clear the whole rseq area before registration
dd1af7715e math: Improve layout of exp/exp10 data
0d13583f6f AArch64: Use prefer_sve_ifuncs for SVE memset
0a9cb633a1 AArch64: Add SVE memset
deaf6aa4c4 math: Improve layout of expf data
2551638fda AArch64: Remove zva_128 from memset
54194134c6 AArch64: Optimize memset
e03ac4920c AArch64: Improve generic strlen
7cf8a6b965 Revert "AArch64: Add vector logp1 alias for log1p"
9ef7093c80 AArch64: Improve codegen for SVE powf
ef3a485e2e AArch64: Improve codegen for SVE pow
3362e1f1ec AArch64: Improve codegen for SVE erfcf
88cd397f1c Aarch64: Improve codegen in SVE exp and users, and update expf_inline
6b8abddeff Aarch64: Improve codegen in SVE asinh
6f73375988 AArch64: Improve codegen in SVE expm1f and users
b0bdf1d034 AArch64: Improve codegen for SVE log1pf users
1be39d1d92 AArch64: Improve codegen for SVE logs
47c6bd3a81 AArch64: Improve codegen in SVE tans
de3f519c6d AArch64: Improve codegen in AdvSIMD asinh
df7a834c5a AArch64: Improve codegen of AdvSIMD expf family
3d0a126ffa AArch64: Improve codegen of AdvSIMD atan(2)(f)
d6c4494351 AArch64: Improve codegen of AdvSIMD logf function family
21f7dd4c0a AArch64: Improve codegen in users of ADVSIMD log1p helper
0a04ee21bf AArch64: Improve codegen in AdvSIMD logs
268dcdf441 AArch64: Improve codegen in AdvSIMD pow
2e970af05b AArch64: Remove SVE erf and erfc tables
94dbda91bb AArch64: Small optimisation in AdvSIMD erf and erfc
b353df1966 AArch64: Simplify rounding-multiply pattern in several AdvSIMD 
routines
bba348ac64 AArch64: Improve codegen in users of ADVSIMD expm1f helper
51ffbb48ee AArch64: Improve codegen in users of AdvSIMD log1pf helper
8d2e122081 AArch64: Improve codegen in SVE F32 logs
4689773070 AArch64: Improve codegen in SVE expf & related routines
350bd22f14 AArch64: Add vector logp1 alias for log1p
80a11bfe5f aarch64: Avoid redundant MOVs in AdvSIMD F32 logs
ce111dcf62 math: Add optimization barrier to ensure a1 + u.d is not reused [BZ 
#30664]
07cd96d110 assert: Add test for CVE-2025-0395
3492b668c0 nptl: Correct stack size attribute when stack grows up [BZ #32574]
618075f301 stdlib: Test using setenv with updated environ [BZ #32588]
ec2faeda69 malloc: obscure calloc use in tst-calloc
54c3922410 Hide all malloc functions from compiler [BZ #32366]

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 sys-libs/glibc/glibc-2.40-r9.ebuild | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sys-libs/glibc/glibc-2.40-r9.ebuild 
b/sys-libs/glibc/glibc-2.40-r9.ebuild
index 003b5ccf16e8..f29e7f79f20b 100644
--- a/sys-libs/glibc/glibc-2.40-r9.ebuild
+++ b/sys-libs/glibc/glibc-2.40-r9.ebuild
@@ -41,7 +41,7 @@ HOMEPAGE="https://www.gnu.org/software/libc/";
 if [[ ${PV} == 9999* ]]; then
        inherit git-r3
 else
-       #KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~loong ~m68k ~mips ~ppc 
~ppc64 ~riscv ~s390 ~sparc ~x86"
+       KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~loong ~m68k ~mips ~ppc 
~ppc64 ~riscv ~s390 ~sparc ~x86"
        SRC_URI="mirror://gnu/glibc/${P}.tar.xz"
        SRC_URI+=" 
https://dev.gentoo.org/~${PATCH_DEV}/distfiles/${P}-patches-${PATCH_VER}.tar.xz";
 fi

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