commit: 3932788ec15c86707ac2d3efe66ea5cd9d29e6cd Author: Matt Turner <mattst88 <AT> gentoo <DOT> org> AuthorDate: Sat Jan 4 19:57:22 2025 +0000 Commit: Matt Turner <mattst88 <AT> gentoo <DOT> org> CommitDate: Sat Jan 4 20:03:36 2025 +0000 URL: https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=3932788e
dev-util/intel_clc: Version bump to 24.3.3 Bug: https://bugs.gentoo.org/940037 Signed-off-by: Matt Turner <mattst88 <AT> gentoo.org> dev-util/intel_clc/Manifest | 1 + dev-util/intel_clc/intel_clc-24.3.3.ebuild | 93 ++++++++++++++++++++++++++++++ 2 files changed, 94 insertions(+) diff --git a/dev-util/intel_clc/Manifest b/dev-util/intel_clc/Manifest index 2e84d6fc801b..63f2007fe59d 100644 --- a/dev-util/intel_clc/Manifest +++ b/dev-util/intel_clc/Manifest @@ -2,3 +2,4 @@ DIST mesa-24.1.7.tar.xz 29206724 BLAKE2B b3102fcf96c032d07826186c2d60dc93e5c17b2 DIST mesa-24.2.8.tar.xz 29622208 BLAKE2B f71a1663f9637883b4c442ba8c68f7960c48c4f8a02412738404386bfb962052923b40c1412198bd29f2ab6cf11654f8c63d4c14a400b89d99229680bc96eaae SHA512 3aa1051a72e1428e42f9537d8f6a26f2ebddc78894e0f71d2cdcc9ed555ea4d6489ad8e74d4c59b8cdf7ea1c629fa725ac2fe1e385db5d3a582d8fe8186392d6 DIST mesa-24.3.1.tar.xz 30611028 BLAKE2B d3efc322388e29f651b15b0396fef8a6acc0cf24881165900845e429dd6cb53d51511f174d6a4017f48962b764b9a42f069825196af9f4ca969a4b46e1108a0e SHA512 deecf58e2c31e35d7c1943bb21184b52133a83fa472925128d3a03a57b26c92a476a6d3f7140ef2b78475b66affdabf97436ee8b324be204ce5bb940f78119c8 DIST mesa-24.3.2.tar.xz 30640276 BLAKE2B d5973506983a23a95c360801a591e13945695e9a0c6f9f3bbb953865aa39ccfabaae624f4cd1edc8ecf479710856f5cc08e4f6374b107a06870906e934ecc5b8 SHA512 ea1065f7b466f1b2b3570c87585d6de15e3784a60d920c9f991c22720197d5947b598ac2c76773bed8150c91360ee5bbc77f3b48780a19502a8c4224baa728b9 +DIST mesa-24.3.3.tar.xz 30657916 BLAKE2B b973227885b3fd5fa6267c150a5e174f5e8a1c6378cf9326845ba75332084d7c914917c8e3b6d7b89f49ede0f5a5b453eb1ce42591e98b0cbad3f85bd3040035 SHA512 280d7a6dd64503ec398d449430270c78b5558c03bfeed3a42346573fd2db1aa3f96f5a212e49288718a7fe27447ee40235b066517622d68b0dfdd7b251a4e85f diff --git a/dev-util/intel_clc/intel_clc-24.3.3.ebuild b/dev-util/intel_clc/intel_clc-24.3.3.ebuild new file mode 100644 index 000000000000..b577e985b4b4 --- /dev/null +++ b/dev-util/intel_clc/intel_clc-24.3.3.ebuild @@ -0,0 +1,93 @@ +# Copyright 2023-2025 Gentoo Authors +# Distributed under the terms of the GNU General Public License v2 + +EAPI=8 + +LLVM_COMPAT=( {16..19} ) +PYTHON_COMPAT=( python3_{10..13} ) + +inherit llvm-r1 meson python-any-r1 + +MY_PV="${PV/_/-}" + +DESCRIPTION="intel_clc tool used for building OpenCL C to SPIR-V" +HOMEPAGE="https://mesa3d.org/"; + +if [[ ${PV} == 9999 ]]; then + S="${WORKDIR}/intel_clc-${MY_PV}" + EGIT_REPO_URI="https://gitlab.freedesktop.org/mesa/mesa.git"; + inherit git-r3 +else + S="${WORKDIR}/mesa-${MY_PV}" + SRC_URI="https://archive.mesa3d.org/mesa-${MY_PV}.tar.xz"; + KEYWORDS="~amd64 ~x86" +fi + +LICENSE="MIT SGI-B-2.0" +SLOT="0" +IUSE="debug" + +RDEPEND=" + dev-util/spirv-tools + >=sys-libs/zlib-1.2.8:= + x11-libs/libdrm + $(llvm_gen_dep ' + dev-util/spirv-llvm-translator:${LLVM_SLOT} + llvm-core/clang:${LLVM_SLOT}= + =llvm-core/libclc-${LLVM_SLOT}* + llvm-core/llvm:${LLVM_SLOT}= + ') +" +DEPEND="${RDEPEND} + dev-libs/expat +" +BDEPEND=" + ${PYTHON_DEPS} + $(python_gen_any_dep " + >=dev-python/mako-0.8.0[\${PYTHON_USEDEP}] + dev-python/packaging[\${PYTHON_USEDEP}] + dev-python/pyyaml[\${PYTHON_USEDEP}] + ") + virtual/pkgconfig +" + +python_check_deps() { + python_has_version -b ">=dev-python/mako-0.8.0[${PYTHON_USEDEP}]" && + python_has_version -b "dev-python/packaging[${PYTHON_USEDEP}]" && + python_has_version -b "dev-python/pyyaml[${PYTHON_USEDEP}]" || return 1 +} + +pkg_setup() { + llvm-r1_pkg_setup + python-any-r1_pkg_setup +} + +src_configure() { + PKG_CONFIG_PATH="$(get_llvm_prefix)/$(get_libdir)/pkgconfig" + + use debug && EMESON_BUILDTYPE=debug + + local emesonargs=( + -Dllvm=enabled + -Dshared-llvm=enabled + -Dintel-clc=enabled + + -Dgallium-drivers='' + -Dvulkan-drivers='' + + # Set platforms empty to avoid the default "auto" setting. If + # platforms is empty meson.build will add surfaceless. + -Dplatforms='' + + -Dglx=disabled + -Dlibunwind=disabled + -Dzstd=disabled + + -Db_ndebug=$(usex debug false true) + ) + meson_src_configure +} + +src_install() { + dobin "${BUILD_DIR}"/src/intel/compiler/intel_clc +}
