Hi Marc, Offhand, I'd say the accuracy of M5's models is pretty typical for an academic research simulator; as with most simulators in this vein, we try to balance performance, flexibility, and accuracy. It's also important to remember that M5 is really a framework that comes with a bunch of models, so it's always possible to enhance an existing component model or even add a new one if none of the existing ones do what you want; while that is some amount of work, it's easier than starting from scratch, or trying to adapt a different simulator that was not designed to be so modular. If there's a specific need you have in mind, let us know, and if M5 doesn't support it we can at least give you some opinions on how easy it would be to add that support.
As far as out-of-order ARM & x86, Ali & Gabe can give you more details, but there's been a lot of work in this area recently, so at worst we're pretty close and should be there before too long. Note that the CPU models are mostly ISA-independent, so the issue of accuracy is independent of specific ISA support. Steve On Tue, Nov 23, 2010 at 9:50 AM, Marc de Kruijf <[email protected]>wrote: > Hello all, > > My research group is considering M5 for ARM and x86 simulation and I have a > very simple question for which I could not find a clear answer on the m5 > website: > Is M5 simulation for ARM and/or x86 cycle-accurate or is it just > microarchitecture simulation? Also, is out-of-order execution supported for > all architectures, including ARM? > > Thank you for your time. > > Marc > > _______________________________________________ > m5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users >
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