Hi, Steve. Thank you for your reply. I am now trying to implemente such an
event like TickEvent to reschedule itselt at the end of every cycle. I hope
this works as the data is quite intensive and the I/O device should have a
pipeline to deal with the data that may arrive in every cycle. Thank you.

在 2010年3月12日 下午10:21,Steve Reinhardt <[email protected]>写道:

> The right way to do this is to have the event reschedule itself every
> time it runs for the proper latency until the next clock tick of the
> device you're simulating.  (Note that you don't want to schedule every
> 1 tick, you need to base the latency off a clock parameter.)  See the
> TickEvent in src/cpu/simple/atomic.{cc,hh} for an example; the event
> gets rescheduled on the last line of the tick() function.
>
> Steve
>
> 2010/3/12 Veydan Wu <[email protected]>:
>  > I just want my I/O device to run in parallel with CPU. Does the CPUs
> run
> > over and over? More specifically speaking, CPU may send something to the
> I/O
> > device to handle, but the time is not fixed. So it is better to let the
> > device keep running and when it receive data ( by the write() function ),
> it
> > can handle it. I do want the handling invoked within the write()
> function, I
> > want it to act like a real hardware device. Is there any way I can do
> this?
> > Thank you very much!
> >
> > Weidan
>
_______________________________________________
m5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/m5-users

Reply via email to