[gem5-users] Re: Can I use RiscvO3CPU with TSO?

[Jason Lowe-Power via gem5-users]

Hello,

That *should* work, but my confidence isn't very high. I suggest running
tests to see if you can produce TSO and non-TSO executions with and without
the option.

Cheers,
Jason

On Thu, Feb 15, 2024 at 12:32 PM Z HW via gem5-users <gem5-users@gem5.org>
wrote:

>
> I know that RISC-V assumes RVWMO. But if I want to run a TSO RISC-V
> implementation, can I simply set needsTSO = True in the RiscvO3CPU
> configuration and be done, or am I overlooking some details about using TSO
> in RISC-V?
>
> I need TSO because I want to enforce load->load, load->store ordering by
> default in my program and don't want to use fences.
>
> Thanks!
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