[gem5-users] Re: ARM KVM Switch + Restoration

[AbdelQader AlKilany via gem5-users]

Hello Jason,

I have attached the files of the checkpoint/restoring.

Thank you for your help.
Abdal

From: Jason Lowe-Power <ja...@lowepower.com>
Sent: Tuesday, August 1, 2023 7:35 PM
To: The gem5 Users mailing list <gem5-users@gem5.org>
Cc: AbdelQader AlKilany <abdelqader.alkil...@huawei.com>
Subject: Re: [gem5-users] ARM KVM Switch + Restoration

This should work... can you provide an example script and specific commands to 
reproduce the error?

Thanks,
Jason

On Tue, Aug 1, 2023 at 11:24 AM AbdelQader AlKilany via gem5-users 
<gem5-users@gem5.org<mailto:gem5-users@gem5.org>> wrote:
Hello gem5 users,

I was wondering if it is possible to start a FS ARM simulation using KVM, 
switch to another CPU type such as Atomic, then restore the CPU type(Atomic), 
and maybe even switch again to O3.

I have tried to do this using the standard library but I have encountered some 
errors such as:

build/ALL/sim/serialize.hh:379: fatal: fatal condition !paramInImpl(cp, name, 
param) occurred: Can't unserialize 'board.processor.start.core:_pid'


I am using:
platform VExpress_Gem5_V1 (since it’s the only one I found to work with KVM)
release ArmRelease.for_kvm()

I used this for both the checkpointing and restoring simulations (I found the 
release worked for non KVM CPUs when not restoring).

Thank you for any help!
Abdal
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from gem5.utils.requires import requires
from gem5.components.boards.arm_board import ArmBoard
from gem5.components.memory.single_channel import SingleChannelDDR3_1600
from gem5.components.processors.simple_switchable_processor import (
    SimpleSwitchableProcessor,
)
from gem5.components.processors.cpu_types import CPUTypes
from gem5.isas import ISA
from gem5.coherence_protocol import CoherenceProtocol
from gem5.simulate.simulator import Simulator
from gem5.simulate.exit_event import ExitEvent
from gem5.resources.workload import Workload, CustomWorkload
from gem5.resources.resource import AbstractResource

from m5.objects import GenericTimer, SimObject, ArmDefaultRelease, 
VExpress_GEM5_V1, VExpress_GEM5_Foundation

requires(
    isa_required=ISA.ARM,
    kvm_required=True,
)
from gem5.components.cachehierarchies.classic.no_cache import NoCache



cache_hierarchy = NoCache()

memory = SingleChannelDDR3_1600(size="3GB")


processor = SimpleSwitchableProcessor(
    starting_core_type=CPUTypes.KVM,
    switch_core_type=CPUTypes.ATOMIC,
    isa=ISA.ARM,
    num_cores=1,
)


release = ArmDefaultRelease.for_kvm()
platform = VExpress_GEM5_V1()
GenericTimer.generateDeviceTree = SimObject.generateDeviceTree



board = ArmBoard(
    clk_freq="3GHz",
    processor=processor,
    memory=memory,
    cache_hierarchy=cache_hierarchy,
    release=release,
    platform=platform,
    )


board.realview.gic.simulate_gic = True


command = ("m5 --addr 0x10010000 exit;" 
+ "m5 checkpoint;"
+ "m5 exit;" 
)


workload= CustomWorkload(
    function = "set_kernel_disk_workload",
    parameters = {
        "bootloader" : 
AbstractResource("system/arm/bootloader/arm64/boot_foundation.arm64"),
        "kernel" : AbstractResource("CustomResource/arm/arm64-vmlinux-5.4.49"),
        "disk_image" : 
AbstractResource("CustomResource/arm/arm64-ubuntu-20220727.img")
    }
)
workload.set_parameter("readfile_contents", command)
board.set_workload(workload)



simulator = Simulator(
    board=board,
    on_exit_event={
        ExitEvent.EXIT: (func() for func in [processor.switch])
    },
)
simulator.run()

from gem5.isas import ISA
from gem5.utils.requires import requires
from gem5.resources.resource import Resource, AbstractResource
from gem5.resources.workload import Workload, CustomWorkload
from gem5.components.memory import SingleChannelDDR3_1600
from gem5.components.processors.cpu_types import CPUTypes
from gem5.components.boards.arm_board import ArmBoard
from gem5.components.cachehierarchies.classic.no_cache import NoCache
from gem5.components.processors.simple_processor import SimpleProcessor
from gem5.components.processors.simple_switchable_processor import 
SimpleSwitchableProcessor
from gem5.simulate.simulator import Simulator
from gem5.simulate.exit_event import ExitEvent
from gem5.coherence_protocol import CoherenceProtocol

from m5.objects import *


requires(
    isa_required=ISA.ARM,
)
cache_hierarchy = NoCache()

memory = SingleChannelDDR3_1600(size="3GB")

processor = SimpleSwitchableProcessor(
    starting_core_type=CPUTypes.ATOMIC,
    switch_core_type=CPUTypes.O3,
    isa=ISA.ARM,
    num_cores=1,
)



release = ArmDefaultRelease.for_kvm()
platform = VExpress_GEM5_V1()
GenericTimer.generateDeviceTree = SimObject.generateDeviceTree



board = ArmBoard(
    clk_freq="3GHz",
    processor=processor,
    memory=memory,
    cache_hierarchy=cache_hierarchy,
    release=release,
    platform=platform,
)

board.realview.gic.simulate_gic = True

command = "m5 exit ;" \
        + "echo 'This is running on o3 CPU cores.';" 

workload= CustomWorkload(
    function = "set_kernel_disk_workload",
    parameters = {
        "bootloader" : 
AbstractResource("system/arm/bootloader/arm64/boot_foundation.arm64"),
        "kernel" : AbstractResource("CustomResource/arm/arm64-vmlinux-5.4.49"),
        "disk_image" : 
AbstractResource("CustomResource/arm/arm64-ubuntu-20220727.img"),
        "checkpoint" : AbstractResource("m5out/KVM_switch"),
    }
)
# workload.set_parameter("readfile_contents", command)
board.set_workload(workload)



simulator = Simulator(
    board=board,
    # full_system=True,
    on_exit_event={
        ExitEvent.EXIT : (func() for func in [processor.switch]),
    },
)
simulator.run()


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