Thank you for your reply again, hahahaha. I have been thinking recently whether 
it is possible to design ALU through Verilog, translate it through Verilator or 
other tools, and ultimately use it in Gem5. I'm not sure if it's feasible. I am 
so obsessed with ALU because I need to provide a rough reproduction of an 
article that uses the Residual Number System (RNS) to design a CPU core. Since 
I first learned about Gem5, I wanted to keep working on this tool. But now it 
doesn't seem very good.




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??????: "The gem5 Users mailing list"<[email protected]&gt;; 
????????: 2023??4??20??(??????) ????10:58
??????: "The gem5 Users mailing list"<[email protected]&gt;; 
????: "????????????????"<[email protected]&gt;; 
????: [gem5-users] gem5&amp;&amp;instruction execute&amp;&amp;ALU



Hello everyone, I would like to ask, when executing non memory access 
instructions in Gem5, shouldn't it be executed in ALU? But ALU has not been 
specifically designed and implemented, how is this instruction executed?
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