I'm wondering what work has been done to model CXL in gem5.
Is it something that can be modeled with existing gem5 components by adjusting their timing and other parameters, or would modeling it well require new components? From a quick high-level review of what CXL is (Wikipedia), I *think* I'm most interested in CXL.cache (giving a device high performance coherent access to memory) and possibly CXL.mem. I'm more interested in modeling the performance than in modeling all the parameter read-out and setup that would be in CXL.io, as I understand it. Regards - Eliot Moss _______________________________________________ gem5-users mailing list -- [email protected] To unsubscribe send an email to [email protected]
