Hi,

I am taking some performance results using In-Order x86, ARM, and RISC-V CPUs in gem5, and I was wondering where to find the number of implemented pipeline stages for each architecture. I have looked into the simulation output files and I am having some difficulty locating this information.

Do you have some advice on how to check this?

Thanks in advance!

Kind regards,
Joao Vieira

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Joao Vieira
ECE PhD Student at Tecnico Lisboa | INESC-ID, Portugal
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