[gem5-users] What happens when a atomic only port is accessed in Timing simulation?

[Zehan Gao]

Hi All,
              I am building a simulated system with a control registers port 
that only implemented recvAtomic function. The control port is connected to the 
IOBridge, and the system is running in timing mode. There is no problem to 
access the registers from CPU, but I wonder what the system does with the 
delay? I believe the atomic port would be treated as a timing port that has no 
delays. But is the delay of IOBridge and other system buses counted?

Thanks,
Zehan


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