Hi, Is there an example system python code like apu_se.py that puts together a multicore CPU (quad or oct) and creates the interconnect with approximate latency between those cores ? If yes, where to find this example model ?
Thanks, David
_______________________________________________ gem5-users mailing list -- [email protected] To unsubscribe send an email to [email protected] %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
