Hi Becker:
Thanks for your reply.
Now I have followed your modification, I can see that the "bti" instruction
has been replaced by "nop", but it always hang here, so do you have any idea?
68338414857000: system.cpu: T0 : 0x7ff7e632d4 : sub x21, x21, #1936
: IntAlu : D=0x0000007ff7ff0010
68338414857500: system.cpu: T0 : 0x7ff7e632d8 : ldr x0, [x21, #208] :
MemRead : D=0x00000000000002b5 A=0x7ff7ff00e0
68338414857500: system.cpu: T0 : 0x7ff7e632dc : subs w1, w0 :
IntAlu : D=0x0000000000000000
68338414857500: system.cpu: T0 : 0x7ff7e632e0 : b.eq
<unlink_anon_vmas+424> : IntAlu :
68338414857500: system.cpu: T0 : 0x7ff7e632e4 : orr x1, xzr, x19 :
IntAlu : D=0x0000007ff7f70360
68338414857500: system.cpu: T0 : 0x7ff7e632e8 : movz w0, #2, #0 :
IntAlu : D=0x0000000000000002
68338414857500: system.cpu: T0 : 0x7ff7e632ec : stp
68338414857500: system.cpu: T0 : 0x7ff7e632ec. 0 : addxi_uop ureg0, sp, #48
: IntAlu : D=0x0000007fffffe770
68338414857500: system.cpu: T0 : 0x7ff7e632ec. 1 : strxi_uop x23, [ureg0] :
MemWrite : D=0x0000007ff7f6f000 A=0x7fffffe770
68338414857500: system.cpu: T0 : 0x7ff7e632ec. 2 : strxi_uop x24, [ureg0,
#8] : MemWrite : D=0x0000007ff7f70000 A=0x7fffffe778
68338414858000: system.cpu: T0 : 0x7ff7e632f0 : bl
<_kernel_size_le_lo32+549610018496> : IntAlu : D=0x0000007ff7e632f4
68338415190000: system.cpu: T0 : 0x7ff7f0b6c0 : nop :
IntAlu :
68338415190000: system.cpu: T0 : 0x7ff7f0b6c4 : adrp x16, #462848 :
IntAlu : D=0x0000007ff7f7c000
68338415190000: system.cpu: T0 : 0x7ff7f0b6c8 : ldrb w16, [w16, #2287] :
MemRead : D=0x0000000000000001 A=0x7ff7f7c8ef
68338415190000: system.cpu: T0 : 0x7ff7f0b6cc : cbz w16,
<_kernel_size_le_lo32+549610018520> : IntAlu :
-----邮件原件-----
发件人: Pedro Becker via gem5-users [mailto:[email protected]]
发送时间: 2022年1月25日 18:16
收件人: [email protected]
抄送: Pedro Becker <[email protected]>
主题: [gem5-users] Re: restore with O3 hang when "bti" instrution meet
Hi Liyuchao,
I'm assuming you are referring to ARM ISA...
BTI is appearing on your code but it's not implemented.
"A BTI instruction is used to guard against the execution of instructions that
are not the intended target of a branch. Outside of a guarded memory region, a
BTI instruction executes as a NOP. "
(See here:
https://developer.arm.com/documentation/100076/0100/a64-instruction-set-reference/a64-general-instructions/bti)
My understanding is that if you are not trying to investigate how this guarding
mechanism works (say, because you are investigating hardware security or
whatever), you can simply ignore that instruction as if your code is outside of
a guarded memory region.
So in src/arch/arm/isa/formats/aarch64.isa you can find the bti instruction and
return a NOP instead of an unimplemented instruction. Something like this:
- return new WarnUnimplemented("bti", machInst);
+ return new NopInst(machInst);
Recompile gem5 and check if it does the trick.
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