Hi all,
I am using gem5 with version 20.1.0.5. I am running a matrix arithmetic
application in SE mode with ARM architecture.
The system I am simulating includes CPU,icache,dcache, l2cache, and dram.
The l2cache has a stride prefetcher. Here are my problems about this stride
prefetcher:
1) the application generates 8128 prefetch candidates and adds them to the
queue, but only 149 of them eventually go to MSHR and generate prefetcher MSHR
miss and go to DDR to get the prefetch data. The big difference between the
number of prefetchers MSHR miss and the number of prefetches issued confused
me. So I use debug-flag = HWPrefetch to find out the reason. from the debug
file it seems the number of prefetches (8128) is right, but these two numbers
so different still confused me. Here are the stats.out:
system.l2.overall_mshr_misses::.l2.prefetcher 149
# number of overall MSHR misses
system.l2.prefetcher.pfIssued 8128 #
number of hwpf issued
system.l2.prefetcher.pfIdentified 8128 #
number of prefetch candidates identified
system.l2.prefetcher.pfBufferHit 0 #
number of redundant prefetches already in prefetch queue
system.l2.prefetcher.pfInCache 0 #
number of redundant prefetches already in cache/mshr dropped
system.l2.prefetcher.pfRemovedFull 0 #
number of prefetches dropped due to prefetch queue size
system.l2.prefetcher.pfSpanPage 1344 #
number of prefetches that crossed the page
2) I try to change the degree of stride prefetcher, the default value is 8 and
I change it to 1. The stats show that the number of unused prefetcher blocks
(evicted before use) is bigger than the number of MSHR l2prefetcher miss. It is
like l2cache evicts more prefetched blocks than it actually prefetches and is
not correct. The stats are as follow:
system.l2.unused_prefetches 134 #
number of HardPF blocks evicted w/o reference
system.l2.overall_mshr_misses::.l2.prefetcher 127
# number of overall MSHR misses
Thanks and regards
Fugelin
Xi'an Jiaotong University
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