[gem5-users] Re: Instruction execute stage clock cycles in MinorCPU

[657029715--- via gem5-users]

Hi Volkan,

I've noticed that you've been working on RISC-V in gem5 and I'd like to ask you 
some questions.

I've added custom instructions to the RISC-V ISA by modifying the contents 
of/src/arch/riscv/ISA/decoder and it works properly. But I want to know how to 
specify the operation time setting of a custom instruction, such as specifying 
which functional unit it executes in and how many cycles a command takes.

Any ideas would be appreciated!
Thanks,
Siqing Fu



657029...@qq.com

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