Hi, I do not know the reason for that. But if you want to create simpoints which will be used by O3CPU, you should use the AtomicSimpleCPU with "--caches" option and also add "--l2cache" if your O3CPU is using L2 cache.
Best regards, Abhishek On Sat, Mar 14, 2020 at 5:53 PM Ali Hajiabadi <[email protected]> wrote: > Thanks for your reply. But se.py script checks that the CPU type is > non-caching. Is there a reason for that? Can I ignore those checks? > > On Sun, Mar 15, 2020 at 5:41 AM Abhishek Singh < > [email protected]> wrote: > >> Hi, >> I would advise using Atomic Simple Cpu with “—caches” option to create >> Simpoints >> >> >> On Sat, Mar 14, 2020 at 5:35 PM Ali Hajiabadi <[email protected]> >> wrote: >> >>> Hi everyone, >>> >>> What is the difference between using NonCachingSimpleCPU >>> and AtomicSimpleCPU in order to profile and taking simpoints and >>> checkpoints? I want to use checkpoints to simulate and evaluate my own >>> modified version of O3 core model. Which CPU type is the best to profile >>> and take checkpoints? I don't want to bypass caches in my O3 model. >>> >>> Also, I am using RISCV implementation of gem5. >>> >>> Thanks, >>> Ali >>> _______________________________________________ >>> gem5-users mailing list >>> [email protected] >>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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