On 5/20/22 12:15 AM, Nicholas Piggin via Gcc wrote:
This takes the arm64 file and adjusts it for powerpc. Feature
descriptions are vaguely handwaved by me.
---
Anybody care to expand on or correct the meaning of these entries or
bikeshed the wording of the intro? Many of them are no longer used
anywhere by upstream kernels and even where they are it's not always
quite clear what the exact intent was, a lot of them are old history
and I don't know what or where they are used.
I may try to get these descriptions pushed into the ABI doc after a
time, but for now they can live in the kernel tree.
Thanks,
Nick
Thanks, this is really helpful. I've been caught off-guard by some of
the subtleties in the meanings of these bits at times. I think it would
be helpful to share what is implied by the usage of the word "facility"
below. It would resolve some of my questions below.
+PPC_FEATURE_HAS_ALTIVEC
+ Vector (aka Altivec, VSX) facility is available.
I think "(aka Altivec, VSX)" might be more accurately stated as "(aka
Altivec)"?
+PPC_FEATURE_HAS_DFP
+ DFP facility is available.
Maybe something like "Decimal floating point instructions are available
to userspace. Individual instruction availability is dependent on the
reported architecture version."?
+PPC_FEATURE_HAS_VSX
+ VSX facility is available.
A small reminder the features are also dependent on architecture version
too might be helpful here too.
+PPC_FEATURE2_TAR
+ VSX facility is available.
Was manipulating the tar spr was once a privileged instruction, is this
a hint userspace can use the related instructions?
+
+PPC_FEATURE2_HAS_IEEE128
+ IEEE 128 is available? What instructions/data?
Maybe something like "IEEE 128 binary floating point instructions are
supported. Individual instruction availability is dependent on the
reported architecture version."?
+PPC_FEATURE2_SCV
+ scv instruction is available.
I think it might be clearer to say "This kernel supports syscalls using
the scv instruction".
+PPC_FEATURE2_MMA
+ MMA facility is available.
Maybe another note that specific instruction availability may depend on
the reported architecture version?
