Hi Joe. Thanks for your comments.
> It is unclear how this would even work. > For instance, the LA instruction clears the top bit. In AM64, LA does not clear any bits. > Also, instructions like LPR, LNR, These operate on data registers, not addresses, and will continue to work unchanged. > BXLE, BXH all treat the value in the register as signed, > so the top bit is not available. These are already a problem if you are putting addresses in them and it is approaching the 2 GiB mark. The POP has a special mention of that. Fun fact: The z/Arch POP has the same problem with the G version of those instructions, when it hits the 63-bit mark, but the POP incorrectly states that the problem occurs near the 64-bit mark. I reported the problem with the POP but nothing seems to have been done. The solution is to drop these instructions from the repertoire. C-generated assembler for both i370 and s390 targets does not use these. BFN. Paul.
