Hi Bin, On 24 October 2017 at 18:29, Bin.Cheng <amker.ch...@gmail.com> wrote: > On Tue, Oct 24, 2017 at 12:44 AM, Kugan Vivekanandarajah > <kugan.vivekanandara...@linaro.org> wrote: >> Hi All, >> >> I am wondering if there is anyway we can prefer certain registers in >> register allocations. That is, I want to have some way of recording >> register allocation decisions (for loads in loop that are accessed in >> steps) and use this to influence register allocation of other loads >> (again that are accessed in steps). >> >> This is for architectures (like falkor AArch64) that use hardware >> perefetchers that use signatures of the loads to lock into and tune >> prefetching parameters. Ideally, If the loads are from the same >> stream, they should have same signature and if they are from different >> stream, they should have different signature. Destination, base >> register and offset are used in the signature. Therefore, selecting >> different register can influence this. > I wonder why the destination register is used in signature. In an extreme > case, > load in loop can be unrolled then allocated to different dest registers. > Forcing > the same dest register could be too restricted.
My description is very simplified. Signature is based on part of the register number. Thus, two registers can have same signature. What we don't want is to have collisions when they are from two different memory stream. So this is not an issue. Thanks, Kugan > > Thanks, > bin > >> >> In LLVM, this is implemented as a machine specific pass that runs >> after register allocation. It then inserts mov instruction with >> scratch registers to manage this. We can do a machine reorg pass in >> gcc but detecting strided loads at that stage is not easy. >> >> I am trying to implement this in gcc and wondering what is the >> preferred and acceptable way to implement this. Any thoughts ? >> >> Thanks, >> Kugan
