On Friday 17 March 2017 07:31 PM, James Greenhalgh wrote: > On Wed, Mar 15, 2017 at 09:50:18AM +0000, Sekhar, Ashwin wrote: >> Hi GCC Team, Aarch64 Maintainers, >> >> >> The rules in Vector Function Application Binary Interface Specification for >> OpenMP >> (https://sourceware.org/glibc/wiki/libmvec?action=AttachFile&do=view&target=VectorABI.txt) >> is used in x86 for generating the simd clones of a function. >> >> Is there a similar one defined for Aarch64? >> >> If not, would like to start a discussion on the same for Aarch64. To kick >> start the same, a draft proposal for Aarch64 (on the same lines as x86 ABI) >> is included below. The only change from x86 ABI is in the function name >> mangling. Here the letter 'b' is used for indicating the ASIMD isa. > > Hi Ashwin, > > Thanks for the question. ARM has defined a vector function ABI, based > on the Vector Function ABI Specification you linked below, which > is designed to be suitable for both the Advanced SIMD and Scalable > Vector Extensions. There has not yet been a release of this document > which I can point you at, nor can I give you an estimate of when the > document will be published. > > However, Francesco Petrogalli has recently made a proposal to the > LLVM mailing list ( https://reviews.llvm.org/D30739 ) which I would > note conflicts with your proposal in one way. You choose 'b' for name > mangling for a vector function using Advanced SIMD, while Francesco > uses 'n', which is the agreed character in the Vector Function ABI > Specification we have been working on. > > I'd encourage you to wait for formal publication of the ARM Vector > Function ABI to prevent any unexpected divergence between > implementations. Thanks for the information. We at Cavium are also working on libraries which requires this ABI specification. So we would like to see this published as early as possible.
> > Thanks, > James > > Thanks Ashwin
