Hi,
new Intel instructions AVX512_4FMAPS and AVX512_4VNNIW introduce use
of register groups.
To support register groups feature in inline asm needed some extension
with new constraints.
Current proposal is the following syntax:
__asm__ (“SMTH %[group], %[single]" :
[single] "+x"(v0) :
[group]
"Yg4"(v1), “1+1"(v2), “1+2"(v3), “1+3"(v4));
where "YgN" constraint specifies group of N consecutive registers
(which is started from register having number as "0 mod
2^ceil(log2(N))"),
and "1+K" specifies the next registers in the group.
Is this syntax ok? How to implement it?
Any comments or proposals will be appreciated, thanks.
--
WBR,
Andrew
