Hi,
I've been looking at updating some of the targets to use LRA. On some
targets that have a one register & immediate instruction format (i.e. dest
register and source register are the same), I see errors such as:
error: insn does not satisfy its constraints:
(insn 2 7 5 2 (set (reg/f:SI 12 r12 [39])
(plus:SI (reg/f:SI 15 sp)
(const_int 4 [0x4]))) file.c 6 {addsi3}
(nil))
internal compiler error: in reload_cse_simplify_operands, at
postreload.c:411
Where the instruction pattern has a match operand constraint ("0"):
(define_insn "addsi3"
[(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r")
(plus:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0")
(match_operand:SI 2 "reg_si_int_operand" "r,M,N,O,i")))]
""
"addd\t%2, %0"
)
This seems to work fine for a number of targets without the LRA, but fails
with. Any pointers as to what needs to be changed to get this to work? Does
the instruction now need additional alternatives to handle the case where
the two registers are different, or are there some target hooks other than
TARGET_LRA_P that need to be implemented?
Thanks,
Jon
