On Mon, Mar 21, 2011 at 10:50 PM, Rohit Arul Raj <rohitarul...@gmail.com> wrote: > Hello All, > > I have a question regarding PowerPC64 bit ABI. Since GCC generates FP > instructions for Non FP code, i was running in to issues with > applications having interrupts (i have seen some threads with people > complaining about this).
What kind of interrupts? Because FP code should only produce an interrupt at the first usage and that is it. Since all PowerPC64 machines have a FPU, there will be no emulation needed. The only other kind of interrupt I can think of is an unaligned load/store for a FPU load/store. If that happens then you have issues dealing with unaligned memory which is most like caused by undefined code. Most PPC64 machines are able to handle word aligned float/double load/stores without an unaligned exception happening. The reason why it is undefined because of alignment requirements in the C/C++ standard. I think you need to do some debugging to figure out why you get the unaligned exceptions. It is most likely a bug in your code. Thanks. Andrew Pinski PS -msoft-float does not work as we don't multilib on -msoft-float for PPC64.
