hi all
Our processor have a outrageous load insn, so I have to make gcc
support it. But when I tried some way, I failed.
When we suppose a load should be:
load_256 $z1, 16($fp) ;load 256bits to a 256bits-wide register.
we have to split it into:
load_low_128 $z1, 16($fp) ;load 128bits to the low
128bits of a 256bits-wide register.
load_low_128 $z2, 32($fp) ;load 128bits to the low
128bits of a 256bits-wide register.
combine_2_to_1 $z1, $z1, $z2, 0x20 ;combine them together.
in mips_output_move, I can return a string such like "load_256 %0, %1",
but I can't return "load_low_128 %0, %1\n
load_low_128 %2, %3\n
combine_2_to_1 %0, %0, %2, 0x20"
%3 is %1+16bytes offset, %0 and %2 are 256bits-wide registers, 0x20 is a const.
in define_insn "mov<mode>_internal", I can't using emit_insn(gen_xxx()).
when I using emit_insn(gen_xxx()) in define_expand "mov<mode>" I get a
error like:
root@localhost:~/# mips64el-unknown-linux-gnu-gcc -S -march=xx xx-simd.c
xx-simd.c: In function 'test_vpaddd_u':
xx-simd.c:33:1: error: unrecognizable insn:
(insn 31 30 32 3 hr-simd.c:28 (set (mem/c/i:V4DI (reg/f:DI 253
virtual-stack-vars) [0 s+0 S32 A256])
(reg:V4DI 257 [ D.5235 ])) -1 (nil))
xx-simd.c:33:1: internal compiler error: in extract_insn, at recog.c:2103
Please submit a full bug report,
Please show me a path, thank you very much!
-Liu
