Quoting Mohamed Shafi <shafi...@gmail.com>:
On 12 November 2010 18:39, Joern Rennecke <amyl...@spamcop.net> wrote:
Quoting Mohamed Shafi <shafi...@gmail.com>:
So i have the following questions:
1. Why is that constraints are not matched here?
Please read the node "Register Classes" in doc/tm.texi .
I am sorry , could you please highlight the relevant portion for me?
In the pattern that i have given the combination (a,W) satisfies the
pattern. But its not matched because i have given then like (da,Wd). I
know that we can combine the constraints together.
Do you think that the attached patch improves the documentation?
2010-11-12 Joern Rennecke <amyl...@spamcop.net>
* doc/tm.texi.in: Spell out that a lack of register class unions
can lead to ICEs.
* doc/tm.texi: Regenerate.
Index: doc/tm.texi
===================================================================
--- doc/tm.texi (revision 166609)
+++ doc/tm.texi (working copy)
@@ -2337,7 +2343,9 @@ union of two classes will be another cla
instruction allows both classes. For example, if an instruction allows
either a floating point (coprocessor) register or a general register for a
certain operand, you should define a class @code{FLOAT_OR_GENERAL_REGS}
-which includes both of them. Otherwise you will get suboptimal code.
+which includes both of them. Otherwise you will get suboptimal code,
+or even internal compiler errors when reload cannot find a register in the
+the class computed via @code{reg_class_subunion}.
You must also specify certain redundant information about the register
classes: for each class, which classes contain it and which ones are
Index: doc/tm.texi.in
===================================================================
--- doc/tm.texi.in (revision 166609)
+++ doc/tm.texi.in (working copy)
@@ -2327,7 +2333,9 @@ union of two classes will be another cla
instruction allows both classes. For example, if an instruction allows
either a floating point (coprocessor) register or a general register for a
certain operand, you should define a class @code{FLOAT_OR_GENERAL_REGS}
-which includes both of them. Otherwise you will get suboptimal code.
+which includes both of them. Otherwise you will get suboptimal code,
+or even internal compiler errors when reload cannot find a register in the
+the class computed via @code{reg_class_subunion}.
You must also specify certain redundant information about the register
classes: for each class, which classes contain it and which ones are
