Paolo Bonzini schrieb:
> On 10/26/2010 07:42 PM, Georg Lay wrote:
>> I set a break at the end of df_simulate_one_insn_backwards.
>> CURRENT = *(live->current->bits)
>> FIRST = *(live->first->bits)
>
> Or call debug_bitmap (). :)
>
>> reg 26 (Stackpointer) and reg 27 (return address) do not matter here.
>> The result ist
>>
>> insn 10 (CALL) CURRENT = FIRST = 0xc008010 = {...,4,15}
>
> Ok, this looks like a bug somewhere (either in DF or in your backend).
hmmm. How could the backend introduce a bug in lifeness?
REG15 is special in some way
- it is call-saved
- it is neither an element of FUNCTION_ARG_REGNO_P nor of EPILOGUE_USES
nor of CALL_[REALLY_]USED_REGISTERS
- CLASS_LIKELY_SPILLED_P is true for REG15
- it has it's own regclass. This is because REG15 is an implicit reg
to many instructions which allows for shorter encoding, so REG15 is
preferred over other regs. However, there is no special functionality
attached to REG15. this regclass it the first regclass after NO_REGS
and subset of a more general set of GPRs, so it's not a "stand alone" reg.
- REG15 ist top of REG_ALLOC_ORDER
- IRA uses priority based allocator (but with CB dumps are the same)
> One reason could be an artificial use at the bottom of the basic block.
> This seems strange because the implicit restore of the register in the
> epilogue would be a definition, not a use. Anyway, can you print the
> liveness bitmap after df_simulate_initialize_backwards?
I patched the following snip at the end of that function.
The %? just prints additional info gcc-func[funcname:passname(passno)]
+ {
+ tric_edump ("%?:\n");
+ debug_bitmap (live);
+ }
It prints
...
df_simulate_initialize_backwards[and:peephole2(202)]:
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 2 15 26 27 }
...
> I also don't see any reason why insn 10 should use d15, though. To
> exclude this, can you walk through df_simulate_defs and df_simulate_uses
> for insn 10, and print (p *def / p *use respectively) each of the defs
> and uses that they encounter?
I attached the dumps for the pass and also the changes I made to df-problems.c
so that you can see in which context the dumps are printed.
> Since liveness is being computed backwards, it's better to think about
> it as "already" being alive. Since it is not alive at the end of the
> basic block (in the dump it's not part of "lr out"), it must have been
> added either by df_simulate_initialize_backwards, or by
> df_simulate_one_insn_backwards on the CALL insn.
Georg Lay
-------
df_simulate_initialize_backwards[and:peephole2(202)]:
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 2 15 26 27 }
u-1 reg 26 bb 2 insn -1 flag 0x0 type 0x1 chain { }
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 2 15 26 27 }
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 2 15 26 27 }
-------
df_simulate_defs[and:peephole2(202)]: (call_insn/j 10 25 11 2 peep2.c:5
(parallel [
(set (reg:SI 2 d2)
(call (mem:HI (symbol_ref:SI ("f") [flags 0x41] <function_decl
0xb75a6280 f>) [0 S2 A16])
(const_int 0 [0x0])))
(use (const_int 1 [0x1]))
]) 92 {call_value_insn} (expr_list:REG_DEAD (reg:SI 4 d4)
(nil))
(expr_list:REG_DEP_TRUE (use (reg:SI 4 d4))
(nil)))
d-1 reg 0 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 1 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 3 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 4 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 5 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 6 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 7 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 18 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 19 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 20 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 21 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 22 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 23 bb 2 insn 10 flag 0x40 type 0x0 chain { }
d-1 reg 2 bb 2 insn 10 flag 0x8 type 0x0 loc 0xb753ce80(0xb759c810) chain { }
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 15 26 27 }
-------
df_simulate_uses[and:peephole2(202)]: (call_insn/j 10 25 11 2 peep2.c:5
(parallel [
(set (reg:SI 2 d2)
(call (mem:HI (symbol_ref:SI ("f") [flags 0x41] <function_decl
0xb75a6280 f>) [0 S2 A16])
(const_int 0 [0x0])))
(use (const_int 1 [0x1]))
]) 92 {call_value_insn} (expr_list:REG_DEAD (reg:SI 4 d4)
(nil))
(expr_list:REG_DEP_TRUE (use (reg:SI 4 d4))
(nil)))
u-1 reg 26 bb 2 insn 10 flag 0x2008 type 0x1 chain { }
u-1 reg 4 bb 2 insn 10 flag 0x8 type 0x1 loc 0xb755ccb4(0xb759c7f0) chain { }
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 4 15 26 27 }
-------
df_simulate_defs[and:peephole2(202)]: (insn 21 23 25 2 peep2.c:5 (set (reg:SI 4
d4)
(reg:SI 15 d15)) 2 {*movsi_insn} (nil))
d-1 reg 4 bb 2 insn 21 flag 0x8 type 0x0 loc 0xb753cd3c(0xb759c7f0) chain { }
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 15 26 27 }
-------
df_simulate_uses[and:peephole2(202)]: (insn 21 23 25 2 peep2.c:5 (set (reg:SI 4
d4)
(reg:SI 15 d15)) 2 {*movsi_insn} (nil))
u-1 reg 15 bb 2 insn 21 flag 0x8 type 0x1 loc 0xb753cd40(0xb759c9d0) chain { }
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 15 26 27 }
-------
df_simulate_defs[and:peephole2(202)]: (insn 23 22 21 2 peep2.c:5 (set (reg:SI
15 d15)
(xor:SI (reg:SI 15 d15)
(reg:SI 4 d4 [ x ]))) 39 {*xorsi3} (expr_list:REG_DEAD (reg:SI 4 d4
[ x ])
(nil)))
d-1 reg 15 bb 2 insn 23 flag 0x8 type 0x0 loc 0xb753cd84(0xb759c9d0) chain { }
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 26 27 }
-------
df_simulate_uses[and:peephole2(202)]: (insn 23 22 21 2 peep2.c:5 (set (reg:SI
15 d15)
(xor:SI (reg:SI 15 d15)
(reg:SI 4 d4 [ x ]))) 39 {*xorsi3} (expr_list:REG_DEAD (reg:SI 4 d4
[ x ])
(nil)))
u-1 reg 4 bb 2 insn 23 flag 0x8 type 0x1 loc 0xb753cd28(0xb759c7a0) chain { }
u-1 reg 15 bb 2 insn 23 flag 0x8 type 0x1 loc 0xb753cd24(0xb759c9d0) chain { }
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 4 15 26 27 }
-------
df_simulate_defs[and:peephole2(202)]: (insn 22 8 23 2 peep2.c:5 (set (reg:SI 15
d15)
(and:SI (reg:SI 4 d4 [ x ])
(const_int -98305 [0xfffe7fff]))) 139 {*andsi3_zeroes.insert.ic}
(nil))
d-1 reg 15 bb 2 insn 22 flag 0x8 type 0x0 loc 0xb753cd6c(0xb759c9d0) chain { }
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 4 26 27 }
-------
df_simulate_uses[and:peephole2(202)]: (insn 22 8 23 2 peep2.c:5 (set (reg:SI 15
d15)
(and:SI (reg:SI 4 d4 [ x ])
(const_int -98305 [0xfffe7fff]))) 139 {*andsi3_zeroes.insert.ic}
(nil))
u-1 reg 4 bb 2 insn 22 flag 0x8 type 0x1 loc 0xb753cd60(0xb759c7a0) chain { }
first = 0x885ee1c current = 0x885ee1c indx = 0
0x885ee1c next = (nil) prev = (nil) indx = 0
bits = { 4 26 27 }
Index: df-problems.c
===================================================================
--- df-problems.c (Revision 1210)
+++ df-problems.c (Arbeitskopie)
@@ -3760,17 +3760,22 @@ df_simulate_defs (rtx insn, bitmap live)
{
df_ref *def_rec;
unsigned int uid = INSN_UID (insn);
+
+ tric_edump ("\n-------\n%?: %r\n", insn);
for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
{
df_ref def = *def_rec;
unsigned int dregno = DF_REF_REGNO (def);
+ debug_df_ref (def);fflush (stdout);fflush (stderr);
/* If the def is to only part of the reg, it does
not kill the other defs that reach here. */
if (!(DF_REF_FLAGS (def) & (DF_REF_PARTIAL | DF_REF_CONDITIONAL)))
bitmap_clear_bit (live, dregno);
}
+
+ debug_bitmap (live);fflush (stdout);fflush (stderr);
}
@@ -3785,12 +3790,16 @@ df_simulate_uses (rtx insn, bitmap live)
if (DEBUG_INSN_P (insn))
return;
+ tric_edump ("\n-------\n%?: %r\n", insn);
+
for (use_rec = DF_INSN_UID_USES (uid); *use_rec; use_rec++)
{
df_ref use = *use_rec;
/* Add use to set of uses in this BB. */
+ debug_df_ref (use);fflush (stdout);fflush (stderr);
bitmap_set_bit (live, DF_REF_REGNO (use));
}
+ debug_bitmap (live);fflush (stdout);fflush (stderr);
}
@@ -3830,19 +3839,28 @@ df_simulate_initialize_backwards (basic_
df_ref *use_rec;
int bb_index = bb->index;
+ tric_edump ("\n-------\n%?:\n");
+ debug_bitmap (live);fflush (stdout);fflush (stderr);
+
for (def_rec = df_get_artificial_defs (bb_index); *def_rec; def_rec++)
{
df_ref def = *def_rec;
+ debug_df_ref (def);fflush (stdout);fflush (stderr);
if ((DF_REF_FLAGS (def) & DF_REF_AT_TOP) == 0)
bitmap_clear_bit (live, DF_REF_REGNO (def));
}
+ debug_bitmap (live);
+
for (use_rec = df_get_artificial_uses (bb_index); *use_rec; use_rec++)
{
df_ref use = *use_rec;
+ debug_df_ref (use);fflush (stdout);fflush (stderr);
if ((DF_REF_FLAGS (use) & DF_REF_AT_TOP) == 0)
bitmap_set_bit (live, DF_REF_REGNO (use));
}
+
+ debug_bitmap (live);fflush (stdout);fflush (stderr);
}
