On Thu, Mar 18, 2010 at 10:29 AM, roy rosen <roy.1ro...@gmail.com> wrote: > Hi, > > I am trying to implement a simple load 8 bytes instruction. > I tried to use movdi so that it would allocate two sequential > registers for the load. > It starts well but in pass subreg1 the insns are decomposed and all DI > operands are replaced with SI. > > I understand that this is a desireable optimzation but then the load > is done using two load 4 bytes instructions. > > Does anybody has any idea what should I do?
Could it be a problem with the constraints in your movdi define_insn ? Pranav
