Gabriel Paubert wrote:
> On Mon, Jan 25, 2010 at 01:34:09PM +0100, Sergio Ruocco wrote:
>> Hi everyone,
>>
>> I am porting GCC to a custom 16-bit microcontroller with very limited
>> addressing modes. Basically, it can only load/store using a (general
>> purpose) register as the address, without any offset:
>>
>> LOAD (R2) R1 ; load R1 from memory at address (R2)
>> STORE R1 (R2) ; store R1 to memory at address (R2)
>>
>> As far as I can understand, this is more limited than the current
>> architectures supported by GCC that I found in the current gcc/config/*.
>
> The Itanium (ia64) has the same limited choice of addressing modes.
>
> Gabriel
Thanks Gabriel.
I dived into the ia64 md, but it is still unclear to me how the various
parts (macros, define_expand and define_insn in MD etc.) work together
to force the computation of a source/dest address plus offset into a
register... can anyone help me with this ?
Thanks,
Sergio
