Quoting Joern Rennecke <amyl...@spamcop.net>:
Quoting Paolo Bonzini <bonz...@gnu.org>:
...
That would be:
clr r7
clr r8
...
move strict-low-part(r7), r0
...
move strict-low-part(r8), r1 --> could reuse r7
This is not implemented but IMHO obsolete, most of the targets will
just use an AND to implement zero extension.
If the target can actually write to partial registers and refer to the
entire register without undue delay, you won't need and zero_extend or
AND operation at all. So this is obsolete only to the extent that such
targets have become fewer / more arcane.
FWIW the ARC mxp had that feature, but it doesn't look like that port
will get into gcc mainline.
P.S.: more common in contemporary targets is the availability of vector
operations. In order to use these to save zero extensions, instead of
the result register you need the inputs to be prepared with a zero
highpart.
E.g. to do a loop with an unsigned short biv, you zero-extend the initial
biv value and the loop increment value, then use a vector add for the biv
increment operation.
