Hello all,
I am trying to port a 32bit arch in GCC 4.4.0. My target has support
for 1bit, 2bit shift and add operations. I tried to write patterns for
this , but gcc is not generating those. The following are the patterns
that i have written in md file:
(define_insn "shift_add_<mode>"
[(set (match_operand:SI 0 "register_operand" "")
(plus:SI (match_operand:SI 3 "register_operand" "")
(ashift:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "immediate_operand" ""))))]
""
"shadd1\\t%1, %0"
)
(define_insn "shift_add1_<mode>"
[(set (match_operand:SI 0 "register_operand" "")
(plus:SI (ashift:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "immediate_operand" ""))
(match_operand:SI 3 "register_operand" "")))]
""
"shadd1\\t%1, %0"
)
(define_insn "shift_n_add_<mode>"
[(set (match_operand:SI 1 "register_operand" "")
(ashift:SI (match_dup 1)
(match_operand:SI 2 "immediate_operand" "")))
(set (match_operand:SI 0 "register_operand" "")
(plus:SI (match_dup 0)
(match_dup 1)))]
""
"shadd2\\t%1, %0"
)
As you can see i have tried combinations. Since i was looking for
pattern matching i didnt bother to write according to the target.
Thought i will do that after i get a matching pattern. When i debugged
GCC was generating patterns with multiply. But that gets discarded
since md file doesnt have those patterns. How can i make GCC generate
shift and add pattern? Is GCC generating patterns with multiply due to
cost issues? I havent mentioned any cost details.
Regards,
Shafi
