--- On Thu, 5/7/09, Maxim Kuvyrkov <ma...@codesourcery.com> wrote:
> From: Maxim Kuvyrkov <ma...@codesourcery.com>
> Subject: Re: scheduling question
> To: atur...@yahoo.com
> Cc: "Vladimir Makarov" <vmaka...@redhat.com>, gcc@gcc.gnu.org
> Date: Thursday, May 7, 2009, 1:01 PM
> Alex Turjan wrote:
> > Hi,
> > During scheduling Im confronted with the fact that an
> instruction is moved
> > from the ready list to queued with the cost 2, while
> according to my
> > expectations the insn should have been moved to queued
> with cost 1.
> >
> > Did anybody experience similar problem?
>
> From what you described it's not clear what the problem
> is. When scheduler infers that an instruction cannot be
> scheduled in the next N cycles (due to DFA hazard or
> insn_cost/dep_cost hook considerations or due to something
> else) the scheduler queues the instruction on (N+1) cycle.
The point is that in found a case in which an insn is moved to queued with cost
2 while it could have been issued in next cycle (which corresponds to queued
with cost 1).
I think the problem is not in the automaton state transition but in the
vector_min_issue_delay. Do you have some documentation of the way
vector_min_issue_delay is constructed?
> Correct, scheduler would be working unnecessarily long
> otherwise.
Maxim thanks a lot for your answer.
