Hi, On Wed, 6 May 2009, Joern Rennecke wrote:
> Richard Earnshaw: > >That won't work because the PIC register on ARM is a pseudo, so > >generating it during prologue generation is too late. It needs to exist > >before data flow analysis starts on the RTL. > > How about emitting a set at each place the PIC register is needed, > and making sure that gcse will will common these sets where > appropriate? Seems overly twisted to me. Richard: no I was confused, you indeed can't wait until prologue emission, sorry. Hmm, so we need some place to either remember the instruction sequence until expansion is done (or at least expansion of the basic blocks started) or alternatively a call into the targets when expansion is done. I'm leaning towards the former. Sorry I wasn't considering the problem careful enough and thought the solution was obvious when it wasn't :-) Ciao, Michael.
