Hello,
Could anyone explain to me what is difference between vec_shl_<vector_mode> and
ashl<vector_mode>3 patterns? It seems to me that both shift a vector operand 1
with scalar operand 2. I tried to understand some targets' implemenation,
e.g., ia64 as follows, and cannot grasp their difference. Does the "whole
vector shift" of vec_shl means treating a vector as a long scalar? Thanks in
advance.
(define_insn "lshr<mode>3"
[(set (match_operand:VECINT24 0 "gr_register_operand" "=r")
(lshiftrt:VECINT24
(match_operand:VECINT24 1 "gr_register_operand" "r")
(match_operand:DI 2 "gr_reg_or_5bit_operand" "rn")))]
""
"pshr<vecsize>.u %0 = %1, %2"
[(set_attr "itanium_class" "mmshf")])
(define_expand "vec_shr_<mode>"
[(set (match_operand:VECINT 0 "gr_register_operand" "")
(lshiftrt:DI (match_operand:VECINT 1 "gr_register_operand" "")
(match_operand:DI 2 "gr_reg_or_6bit_operand" "")))]
""
{
operands[0] = gen_lowpart (DImode, operands[0]);
operands[1] = gen_lowpart (DImode, operands[1]);
})
Cheers,
Bingfeng Mei
Broadcom UK
