> As I repeatedly said having sizetype of a different precision than
> pointer types will cause all sorts of problems ;)
And as I've rebutted repeatedly, I can't change the chip.
> The middle-end generally assumes it can cast between sizetype and
> pointers arbitrarily.
Bad assumption. It will get worse with the upcoming named address
branch work.
> In the above case, what type is tmp_9, what type is tmp_16?
The 107t dump file doesn't say, but the .128r.expand file looks like this:
;; D.1229 = (unsigned int) tmp;
(insn 36 35 37 20000412-6.c:14 (set (reg:SI 53)
(sign_extend:SI (reg/v/f:PSI 48 [ tmp ]))) -1 (nil))
(insn 37 36 0 20000412-6.c:14 (set (reg:HI 47 [ D.1229 ])
(subreg:HI (reg:SI 53) 0)) -1 (nil))
;; if (bufend > (short unsigned int *) D.1229)
(insn 39 37 40 20000412-6.c:18 (set (reg:SI 55)
(zero_extend:SI (reg:HI 47 [ D.1229 ]))) -1 (nil))
(insn 40 39 41 20000412-6.c:18 (set (reg:PSI 54)
(truncate:PSI (reg:SI 55))) -1 (nil))
So it goes PSI -> SI -> HI -> SI -> PSI
