Hello, Dr. Uday Khedker:
   I just found that emit_move_insn function can't be used in define_expand 
pattern in the spim gcc4.0.2 platform. It will cause the Segmentation Fault. 
Something like recursion happened. 
   I changed the define_expand "movsi" from:

(define_expand "movsi"
        [(set (match_operand:SI 0 "nonimmediate_operand" "")
              (match_operand:SI 1 "general_operand" "")
        )]
        ""
    {
          if(GET_CODE(operands[0])==MEM && GET_CODE(operands[1])!=REG)
          {
             if(!no_new_pseudos)
             {
                  operands[1]=force_reg(SImode,operands[1]);
             }
          }
    }
)

 to :

(define_expand "movsi"
        [(set (match_operand:SI 0 "nonimmediate_operand" "")
              (match_operand:SI 1 "general_operand" "")
        )]
        ""
    {
          if(GET_CODE(operands[0])==MEM && GET_CODE(operands[1])!=REG)
          {
             if(!no_new_pseudos)
             {
                  operands[1]=force_reg(SImode,operands[1]);
             }
          }
          printf("Here1\n");
          emit_move_insn (operands[0],  operands[1]);
          printf("Here2\n");
          DONE; 
    }
)
  
 The string 'Here2' nerver come out. Before Segmentation fault occurred, cc1 
prints lots of the 'Here1'. So I guess the function emit_move_insn caused the 
recursion. But I checked the mips md files. Mips also used the emit_move_insn 
function in define_expand "movsi" pattern. So I guess whether I missed 
something in md file. Can you give me any advices? 

Thank you very much.

Best Wishes.
                                                 Tian Xiaonan

 
--- On Tue, 12/9/08, Uday P. Khedker <u...@cse.iitb.ac.in> wrote:

> From: Uday P. Khedker <u...@cse.iitb.ac.in>
> Subject: Re: redundancy code
> To: tianxiaonan2...@yahoo.com.cn
> Date: Tuesday, December 9, 2008, 12:25 PM
> Hi Tian,
> 
> The goal of our machine descriptions has been to identify
> the
> minimal and hence essential parts of machine descriptions
> in
> order to generate correct code. Improving the code quality
> has
> not been addressed in these descriptions. In due course of
> time,
> we should be able to devise methodology for developing
> machine
> descriptions that address optimizations also.
> 
> If you are interested in pursuing this idea, I will be
> happy to
> interact with you.
> 
> With best regards,
> 
> Uday Khedker.
> ----------------------------------------------------------------------
> Dr. Uday Khedker
> Associate Professor
> Department of Computer Science & Engg.
> IIT Bombay, Powai, Mumbai 400 076, India.
> email   : u...@cse.iitb.ac.in
> homepage: http://www.cse.iitb.ac.in/~uday
> phone   : Office - 91 (22) 2576 7717
>           Res.   - 91 (22) 2576 8717, 91 (22) 2572 0288
> ----------------------------------------------------------------------
> 
> 
> > Hello,
> >    I used the spim5 gcc 4.0.2 to study gcc port. but I
> found there are
> > lots of the 'move' insns redundancy code. For
> example, the C code like
> > this:
> >   i=1;
> >   i = i + 5;
> > the Spim compiler will generate the code like the
> following(PS:RX is the
> > register) .
> >  li R0,  #1
> >  SW R0,  0(MEM)
> >  LW R0,  0(MEM)
> >  Addi  R0,  R0,  #5
> >  SW R0,  0(MEM)
> >
> > Obviously, there are two insn redundancy. What
> confused me is how it
> > generated. Is problem in the 'define_insn mov'
> pattern or the
> > define_peephole insn?
> >
> > spim5 porting backend code
> >
> here:http://www.cse.iitb.ac.in/~uday/gcc-workshop/downloads/IITB-Incremental-Machine-Descriptions/
> > Thank you.
> >                                                    
> Tian Xiaonan
> >
> >
> >
> >
> >      
> ___________________________________________________________
> >  
> ºÃÍæºØ¿¨µÈÄã·¢£¬ÓÊÏäºØ¿¨È«ÐÂÉÏÏߣ¡
> > http://card.mail.cn.yahoo.com/
> >



Reply via email to