On Tue, Dec 16, 2008 at 12:28:10PM +0700, Ha Luong wrote:
> I used gcc-4.3.2 to compile the c source(*) and it generated
> "vmhraddshs" instruction when I compiled with -mcpu=8540.
> 000103A4: 11EB0321 vmhraddshs vr15,vr11,vr0,vr12
You are running into the problem that the Altivec and SPE opcode spaces
overlap, so the instructions that you see generated depend on what
disassembler you use. For example, compiling the assembler file test.s:
.text
.long 0x10074B20
.long 0x11eb0321
with:
powerpc-linux-gnu-gcc -c -o test.o test.s
and disassembling:
powerpc-linux-gnu-objdump -d test.o
gives you:
Disassembly of section .text:
00000000 <.text>:
0: 10 07 4b 20 vmhaddshs v0,v7,v9,v12
4: 11 eb 03 21 vmhraddshs v15,v11,v0,v12
but if you tell objdump to disassemble e500 instructions instead (use -M
e500x2 to include e500v2 instructions):
powerpc-linux-gnu-objdump -d -M e500 test.o
you see:
Disassembly of section .text:
00000000 <.text>:
0: 10 07 4b 20 evstddx r0,r7,r9
4: 11 eb 03 21 evstdd r15,0(r11)
The compiler is generating evstdd{,x} instructions, not vmhraddshs
instructions.
-Nathan
