Kenneth Zadeck wrote:
Richard Sandiford wrote:
Hi Joern,
Thanks for the answer,
Joern Rennecke <[EMAIL PROTECTED]> writes:
Thanks very much for replying to this. We were starting to get worried
that no one was going to reply and we would be left out in the cold.
Some of us might be on vacation or afraid to reply, or both :-) It's
only been like 10 years since I've had to ponder most of these issues.
In regards to partial integer modes, one could resurrect the mn102 which
relied on PSImode to represent addresses to see how things worked.
The in-memory representation was natural based on WORDS_BIG_ENDIAN &
BYTES_BIG_ENDIAN.
We were lucky enough that the top 8 bits of these PSImode values were
totally ignored. When you loaded a PSImode value out of memory you
literally loaded 24 bits of information into the appropriate address
register (which was 24bits wide).
I dont recall allowing subregs of hard regs -- the subreg should have
just collapsed to the narrower or wider object as necessary. ie
(subreg:HI (reg:PSI X))
would have collapsed to just
(reg:HI X) or (reg:HI X+1) depending on which hunk you needed
And similarly if you needed a paradoxical subreg of a hard reg in a
partial integer mode.
Jeff
